• Title/Summary/Keyword: output current

Search Result 4,013, Processing Time 0.033 seconds

Study on the Emergency Broadcasting System Using Ultrasonic Waves (초음파를 이용한 비상방송시스템에 관한 연구)

  • Baek, Dong-Hyun
    • Fire Science and Engineering
    • /
    • v.33 no.6
    • /
    • pp.186-189
    • /
    • 2019
  • NFSC 202 stipulates that if a loudspeaker or wiring on one floor of a building is shorted because of fire, it should not interfere with the fire notification on the other floors. To address this problem, this study proposes an ultrasonic transmitter/receiver consisting of an ADC, HPF, and LPF in an emergency broadcasting system that can operate regardless of the volume level of the amplifier output loudspeaker capacity. After transmitting the transmission frequency at -12 dB (110 kHz), it is received at -18 dB by transmitting -12 dB in case of short circuit depending on the frequency characteristics. Typically, depending on the loudspeaker capacity, it is received from -24 dB to -66 dB. In case of disconnection, it exceeds -66 dB and no data are received. It is also possible to check the track status during fire or general broadcasting. Thus, it was confirmed that the system is suitable for NFSC 202 regulations. Furthermore, as the current system is replaced, the inspection or test criteria should be amended or revised.

W-Band MMIC chipset in 0.1-㎛ mHEMT technology

  • Lee, Jong-Min;Chang, Woo-Jin;Kang, Dong Min;Min, Byoung-Gue;Yoon, Hyung Sup;Chang, Sung-Jae;Jung, Hyun-Wook;Kim, Wansik;Jung, Jooyong;Kim, Jongpil;Seo, Mihui;Kim, Sosu
    • ETRI Journal
    • /
    • v.42 no.4
    • /
    • pp.549-561
    • /
    • 2020
  • We developed a 0.1-㎛ metamorphic high electron mobility transistor and fabricated a W-band monolithic microwave integrated circuit chipset with our in-house technology to verify the performance and usability of the developed technology. The DC characteristics were a drain current density of 747 mA/mm and a maximum transconductance of 1.354 S/mm; the RF characteristics were a cutoff frequency of 210 GHz and a maximum oscillation frequency of 252 GHz. A frequency multiplier was developed to increase the frequency of the input signal. The fabricated multiplier showed high output values (more than 0 dBm) in the 94 GHz-108 GHz band and achieved excellent spurious suppression. A low-noise amplifier (LNA) with a four-stage single-ended architecture using a common-source stage was also developed. This LNA achieved a gain of 20 dB in a band between 83 GHz and 110 GHz and a noise figure lower than 3.8 dB with a frequency of 94 GHz. A W-band image-rejection mixer (IRM) with an external off-chip coupler was also designed. The IRM provided a conversion gain of 13 dB-17 dB for RF frequencies of 80 GHz-110 GHz and image-rejection ratios of 17 dB-19 dB for RF frequencies of 93 GHz-100 GHz.

Grid Unit Based Analysis of Climate Change Driven Disaster Vulnerability in Urban Area (격자단위 분석기법을 적용한 도시 기후변화 재해취약성분석)

  • Hong, Jeajoo;Lim, HoJong;Ham, YoungHan;Lee, ByoungJae
    • Spatial Information Research
    • /
    • v.23 no.6
    • /
    • pp.67-75
    • /
    • 2015
  • Today, because human settlements are concentrated into urban area, urban planning and management technique considering the complexity, diversity, and advanced situations of urban living space is being requested. Especially, to effectively respond to large and diverse climate change driven disaster, it is necessary to develop urban planning technique including land use, infrastructure planning based on disaster vulnerability analysis. However, because current urban climate change disaster vulnerability analysis system(UC-VAS) is using census output area as spatial analysis unit, it is difficult to utilize the analysis results for specific urban planning. Instead, this study applies the grid manner to two study areas. The analysis results show that it can generate more detailed results and it can be used for detailed zoning decision by comparing with areal photos. Furthermore, by describing the limitation of the grid manner and providing professional way to secure additional scientific character and objectivity of the future urban climate change disaster vulnerability analysis system, it is expected that this study contributes to the effectiveness of system management.

Blood Pressure Simulator using An Optimal Controller with Disturbance Observer

  • Kim, Cheol-Han;Han, Gi-Bong;Lee, Hyun-Chul;Kim, Yun-Jin;Nam, Ki-Gon;SaGong, Geon;Lee, Young-Jin;Lee, Kwon-Soon;Jeon, Gye-Rok;Ye, Soo-Young
    • International Journal of Control, Automation, and Systems
    • /
    • v.5 no.6
    • /
    • pp.643-651
    • /
    • 2007
  • The various blood pressure simulators have been proposed to evaluate and improve the performance of the automatic sphygmomanometer. These have some problems such as the deviation of the actual blood pressure waveform, limitation in the blood pressure condition of the simulator, or difficulty in displaying the blood flow. An improved simulator using disturbance observer is proposed to supplement the current problems of the blood pressure simulator. The proposed simulator has an artificial arm model capable of feeding appropriate fluids that can generate the blood pressure waveform to evaluate the automatic sphygmomanometer. A controller was designed and thereafter, simulation was performed to control the output signal with respect to the reference input in the fluid dynamic model using the proposed proportional control valve. To minimize the external fluctuation of pressure applied to the artificial arm, a disturbance observer was designed on the plant. A hybrid controller combined with a proportional controller and feed-forward controller was fabricated after applying a disturbance observer to the control plant. Comparison of the simulations between the conventional proportional controller and the proposed hybrid controller indicated that even though the former showed good control performance without disturbance, it was affected by the disturbance signal induced by the cuff. The latter exhibited an excellent performance under both situations.

(The Speed Control of Induction Motor using PD Controller and Neural Networks) (PD 제어기와 신경회로망을 이용한 유도전동기의 속도제어)

  • Yang, Oh
    • Journal of the Institute of Electronics Engineers of Korea SC
    • /
    • v.39 no.2
    • /
    • pp.157-165
    • /
    • 2002
  • This paper presents the implementation of the speed control system for 3 phase induction motor using PD controller and neural networks. The PD controller is used to control the motor and to train neural networks at the first time. And neural networks are widely used as controllers because of a nonlinear mapping capability, we used feedforward neural networks(FNN) in order to simply design the speed control system of the 3 phase induction motor. Neural networks are tuned online using the speed reference, actual speed measured from an encoder and control input current to motor. PD controller and neural networks are applied to the speed control system for 3 phase induction motor, are compared with PI controller through computer simulation and experiment respectively. The results are illustrated that the output of the PD controller is decreased and feedforward neural networks act main controller, and the proposed hybrid controllers show better performance than the PI controller in abrupt load variation and the precise control is possible because the steady state error can be minimized by training neural networks.

Implementation of a CMOS RF Transceiver for 900MHz ZigBee Applications (ZigBee 응용을 위한 900MHz CMOS RF 송.수신기 구현)

  • Kwon, J.K.;Park, K.Y.;Choi, Woo-Young;Oh, W.S.
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.43 no.11 s.353
    • /
    • pp.175-184
    • /
    • 2006
  • In this paper, we describe a 900MHz CMOS RF transceiver using an ISM band for ZigBee applications. The architecture of the designed rx front-end, which consists of a low noise amplifier, a down-mixer, a programmable gain amplifier and a band pass filter. And the tx front-end, which consists of a band pass filter, a programmable gain amplifier, an up-mixer and a drive amplifier. A low-if topology is adapted for transceiver architecture, and the total current consumption is reduced by using a low power topology. Entire transceiver is verified by means of post-layout simulation and is implemented in 0.18um RF CMOS technology. The fabricated chip demonstrate the measured results of -92dBm minimum rx input level and 0dBm maximum tx output level. Entire power consumption is 32mW(@1.8VDD). Die area is $2.3mm{\times}2.5mm$ including ESD protection diode pads.

Optical AND/OR gates based on monolithically integrated vertical cavity laser with depleted optical thyristor (집적화된 광 싸이리스터와 수직구조 레이저를 이용한 광 로직 AND/OR 게이트에 관한 연구)

  • Choi, Woon-Kyung;Kim, Doo-Gun;Kim, Do-Gyun;Choi, Young-Wan
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.43 no.12 s.354
    • /
    • pp.40-46
    • /
    • 2006
  • Latching optical switches and optical logic gates AND and OR are demonstrated, for the first time, by the monolithic integration of a vertical cavity lasers with depleted optical thyristor structure, which have not only a low threshold current with 0.65mA, but also a high on/off contrast ratio more than 50dB. By simple operating technique with changing a reference switching voltage, this single device operates as two logic functions, optical logic AND and OR. The thyristor laser fabricated using the oxidation process achieved a high optical output power efficiency and a high sensitivity to the optical input light.

Color halftoning based on color correction using vector error diffusion (벡터 오차 확산법을 이용한 색보정 기반의 칼라 중간조 처리법)

  • Choi, Woen-Hee;Lee, Cheol-Hee;Kim, Jeong-Yeop;Kim, Hee-Soo;Ha, Yeong-Ho
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.37 no.5
    • /
    • pp.76-83
    • /
    • 2000
  • This paper proposes a new color halftorning method using color correction by vector error diffusion to reduce color difference, necessarily appears on cross-media color reproduction In order to predict output colors on each device, a neural system IS applied and mean prediction errors in device characterization for monitor and printer are defined to calculate the thresholds for color correction Thus, color difference between monitor and printer is compared per each pixel If color difference is larger than the predetermined mean prediction errors, the halftoned dots to the current pixel are rearranged by vector error diffusion The proposed method can reduce the smear artifact by selective vector error diffusion and decrease color difference on cross- media color reproduction by color correction.

  • PDF

A CMOS Analog Front End for a WPAN Zero-IF Receiver

  • Moon, Yeon-Kug;Seo, Hae-Moon;Park, Yong-Kuk;Won, Kwang-Ho;Lim, Seung-Ok;Kang, Jeong-Hoon;Park, Young-Choong;Yoon, Myung-Hyun;Yoo, June-Jae;Kim, Seong-Dong
    • Proceedings of the IEEK Conference
    • /
    • 2005.11a
    • /
    • pp.769-772
    • /
    • 2005
  • This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable-gain amplifier(PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance(Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of $0.19mm^2$.

  • PDF

Low Power Consumption Scan Driver Using Depletion-Mode InGaZnO Thin-Film Transistors (공핍 모드 InGaZnO 박막 트랜지스터를 이용한 저소비전력 스캔 구동 회로)

  • Lee, Jin-Woo;Kwon, Oh-Kyong
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.49 no.2
    • /
    • pp.15-22
    • /
    • 2012
  • A low power consumption scan driver using depletion-mode n-type InGaZnO thin-film transistors is proposed. The proposed circuit uses 2 clock signals and generates the non-overlap output signals without the additional masking signals and circuits. The power consumption of the proposed circuit is decreased by reducing the number of the clock signals and short circuit current. The simulation results show that the proposed circuit operates successfully when the threshold voltage of TFT is varied from -3.0V to 1.0V. The proposed scan driver consumes 4.89mW when the positive and negative supply voltage is 15V and -5V, respectively, and the operating frequency is 46KHz on the XGA resolution panel.