• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.3
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• pp.269-281
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• 2014

In this paper, a systematic design of a low phase noise voltage-tuned dielectric resonator oscillator(VTDRO) using loop group delay is proposed. Designed VTDRO is closed-loop type and consists of a cascade connection of a resonator, phase shifter, and amplifier. Firstly, a reference VTDRO is fabricated and its phase noise and electrical frequency tuning range are measured. Both the phase noise and electrical frequency tuning range depend on the loop group delay. Then, a required value of loop group delay for a new VTDRO with a low phase noise can be systematically computed. In addition, its phase noise and electrical frequency tuning range can be theoretically estimated using those obtained from the measurement of the reference VTDRO. When the loop group delay increases, the phase noise decreases and the electrical frequency tuning range also decreases. The former predominantly depends on the resonator structure. Therefore we propose a systematic design procedure of a resonator with high group delay characteristics. The measured loop group delay of the new VTDRO is about 700 nsec. The measured phase noise of the new VTDRO show a state-of-the-art performance of 154.5 dBc/Hz at 100 kHz frequency offset and electrical frequency tuning range of 448 kHz for a voltage change of 0~10V. The oscillation power is about 4.39 dBm.

• Journal of IKEEE
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• v.19 no.4
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• pp.500-505
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• 2015

Through Montecarlo simulation, this study compares how accurately the existing three phase deviation models estimate the time-varying variance of a planar oscillator perturbed by Gaussian noises. The comparison reveals that Kaertner model estimates the time-varying variance with about 1000 times higher accuracy than ISF or PP model exhibits. Additionally, it finds that the estimation accuracy of PP model is somewhat higher than that of ISF model.

• International journal of advanced smart convergence
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• v.10 no.3
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• pp.81-88
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• 2021

This paper proposes two types of subharmonic RF receiver front-end (called LMV) where, in a single stage, quadrature voltage-controlled oscillator (QVCO) is stacked on top of a low noise amplifier. Since the QVCO itself plays the role of the single-balanced subharmonic mixer with the dc current reuse technique by stacking, the proposed topology can remove the RF mixer component in the RF front-end and thus reduce the chip size and the power consumption. Another advantage of the proposed topologies is that many challenges of the direct conversion receiver can be easily evaded with the subharmonic mixing in the QVCO itself. The intermediate frequency signal can be directly extracted at the center taps of the two inductors of the QVCO. Using a 65 nm complementary metal oxide semiconductor (CMOS) technology, the proposed subharmonic RF front-ends are designed. Oscillating at around 2.4 GHz band, the proposed subharmonic LMVs are compared in terms of phase noise, voltage conversion gain and double sideband noise figure. The subharmonic LMVs consume about 330 ㎼ dc power from a 1-V supply.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.95-101
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• 2008

We have used diversely the multilayer ceramic oscillator of the SMD(Surface Mounted Device) package technology that connects the crystal with the chip package. Such an oscillator occurs a stray inductance and a parasitic capacitance by the length and inner pattern. And it has been happened an amplitude attenuation and signal loss due to the reflection of power source and noise component. So we don't evaluate the precise performance of the oscillator for these factors. In this paper we have developed the Jig system to evaluate the performance of the oscillator. Through this system, we will expect an advanced performance of the oscillator and redesign an oscillator of the low jitter characteristics and low phase noise.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.8 no.4
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• pp.46-52
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• 2009

In this paper, a novel VCO (Voltage Controlled Oscillator) structure is proposed to achieve the characteristic of low phase noise and a wide frequency tuning range. The proposed scheme adopts an impedance transforming technique to change a series resonance into a parallel resonance for maximizing the susceptance slope parameter. The manufactured VCO shows a frequency tuning bandwidth of 600MHz from 10.1GHz to 10.7GHz with a tuning voltage varying from 0 to 9V, an excellent phase noise below -119dBc/Hz@1MHz offset. The harmonic suppression is measured above 28dB.

• International journal of advanced smart convergence
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• v.9 no.1
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• pp.172-176
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• 2020

The implementation of a low phase noise voltage controlled oscillator (VCO) is important for the signal integrity of wireless communication terminal. A low phase noise wideband VCO for a wireless local area network (WLAN) application is presented in this paper. A 6-bit coarse tune capacitor bank (capbank) and a fine tune varactor are used in the VCO to cover the target band. The simulated oscillation frequency tuning range is from 8.6 to 11.6 GHz. The proposed VCO is desgned using 65 nm CMOS technology with a high quality (Q) factor bondwire inductor. The VCO is biased with 1.8 V VDD and shows 9.7 mA current consumption. The VCO exhibits a phase noise of -122.77 and -111.14 dBc/Hz at 1 MHz offset from 8.6 and 11.6 GHz carrier frequency, respectively. The calculated figure of merit(FOM) is -189 dBC/Hz at 1 MHz offset from 8.6 GHz carrier. The simulated results show that the proposed VCO performance satisfies the required specification of WLAN standard.

• Journal of the Korea Institute of Military Science and Technology
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• v.16 no.3
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• pp.373-381
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• 2013

In this paper, the effects of phase noise on the radar system were analyzed in terms of 3 point of view. The impact(s) on the compressed pulse waveform, the FMICW(Frequency Modulated Interrupted Continuous Wave) radar performance and the receiver sensitivity were investigated. From the investigation, it was indicated that the phase noise over 10 kHz offset frequency makes the side lobe level of compressed pulse worse. Also it was founded that the FMICW radar performance, especially at the noise level of range profile, is related to the phase noise. Finally, the investigation showed that the phase noise at local oscillator affects the receiver sensitivity.

• International Journal of Internet, Broadcasting and Communication
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• v.15 no.3
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• pp.122-128
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• 2023

This paper proposes two kinds of single-balanced direct conversion quadrature receivers using selfoscillating LMVs in which the voltage-controlled oscillator (VCO) itself operates as a mixer while generating an oscillation. The two LMVs are complementary coupled and series coupled to generate the quadrature oscillating signals, respectively. Using a 65 nm CMOS technology, the proposed quadrature receivers are designed and simulated. Oscillating at around 2.4 GHz frequency, the complementary coupled quadrature receiver achieves the phase noise of -28 dBc/Hz at 1KHz offset and -109 dBc/Hz at 1 MHz offset frequency. The other series coupled receiver achieves the phase noise of -31 dBc/Hz at 1KHz offset and -109 dBc/Hz at 1 MHz offset frequency. The simulated voltage conversion gain of the two single-balanced receivers is 37 dB and 45 dB, respectively. The double-sideband noise figure of the two receivers is 5.3 dB at 1 MHz offset. The quadrature receivers consume about 440 μW dc power from a 1.0-V supply.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.7
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• pp.1210-1218
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• 2001

In this paper, A X-band voltage-controlled hair-pin resonator oscillator(VCHRO) is able to a local oscillator or a signal source in transmitter/receiver of a microwave communication system for mobile radar, is designed and fabricated In order to apply mobile radar system is used the hair-pin resonator stronger on shock or vibration than the dielectric resonator, and also, in order to improvement the phase noise and output power is used a system of serial feedback format A hair-pin resonator was simulated by momentum method of HP ADS and then a oscillator circuit was designed that operates at 10.525 GHz by nonlinear method in harmonic balance simulation. The HRO generated output power of 6.93 dBm at 10.525 GHz, phase noise of -57.74 dBc at 100 kHz offset from carrier and the 2'nd harmonic was suppressed -23.90 dBc.

• Journal of Advanced Navigation Technology
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• v.2 no.1
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• pp.22-33
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• 1998

In the coherent-on-receiver radar system using the magnetron source, frequency synthesizer is employed as a STALO(Stable Local Oscillator) to keep the intermediate frequency stable. In this paper, X-band(8.4GHz~9.7GHz) single loop frequency synthesizer is designed and implemented by an indirect frequency synthesis technique. Phase comparison is performed by a digital PLL(Phase-Locked Loop) chip and the loop filter is designed for the low phase noise. The effects of loop component characteristics on the output phase noise are analyzed for single loop structures, and the calculated results are compared with the measured data.