• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2002.04a
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• pp.302-307
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• 2002

In end milling process, the undeformed chip section area and cutting forces vary periodically with phase change of the tool. However, the real undeformed chip section area deviates from the geometrically ideal one owing to cutter runout and tool shape error. In this study, a method of estimating the real undeformed chip section area which reflects cutter runout and tool shape error was presented during up-end milling of Inconel 718 using measured cutting forces. The specific cutting resistance, K. and $K_t$ are defined as the radial and tangential cutting forces divided by the modified chip section area. Both of $K_r$, and $K_t$ values become smaller as the helix angle increases from $30^\circ$ to $40^\circ$ Whereas they become larder as the helix angle increases from $40^\circ$ to $50^\circ$. On the other hand, the $K_r$, and $K_t$ values show a tendency to decrease with increase of the modified chip section area and this tendency becomes distinct with smaller helix angle.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.11 no.5
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• pp.45-52
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• 2002

In an end milling process, the undeformed chip section area and cutting forces vary periodically with the phase change of the tool. However, the real undeformed chip section area deviates from the geometrically ideal one owing to the cutter runout and tool shape error. In the current study, a method of estimating the real undeformed chip section area which reflects the cutter runout and tool shape error is presented during up-end milling processes of Inconel 718. The specific cutting forces, $K_r$ and $K_t$ are defined as the radial and tangential cutting forces divided by the modified chip section area, respectively. Both of the $K_{r}$ and $K_t$ values become smaller as the helix angle increases from $30^{\circ}$ to $40^{\circ}$. Whereas they become larger as the helix angle increases from $40^{\circ}$ to $50^{\circ}$. The $K_r$ and $K_t$ values show a tendency to decrease with increase of the modified chip section area.a.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.5 s.347
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• pp.48-53
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• 2006

This paper describes the electrical characteristics of monolithic optical transceiver circuitry being used in the fiber optic modules. It has been designed and fabricated, and compared with two chips version transceiver when operates at 155.52 Mbps data rates. To avoid noise and interference between transmitter and receiver on one chip, layout techniques such as special placement, power supply separation, guard ring, and protection wall were used in the design. To compare the two kind of fiber optic modules using each chip, single chip version has similar properties to two chip version in the electrical characteristics as noise and others.

• Journal of IKEEE
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• v.9 no.2 s.17
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• pp.101-107
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• 2005

This paper presents an one-chip controller for an electronic dispenser. The electronic dispenser is composed of electronic part and mechanical part. The electronic part is consisted of input keypad, micro-controller, display module, and pump module. In this paper we designed micro-controller for the electronic part. The micro-controller controls display module and pump module. The display module is composed by LCD device, and the pump module is composed by motor device . The micro-controller for an electronic dispenser is designed by VHDL. We used WX12864AP1 for the LCD device and SPS20 for the stepping motor. Also, the micro-controller is designed by Altera Quartus tool and verified with Agent 2000 Design-kit using APEX20K Device. In this paper, we present possibility to adopt of the biomedical device through the one-chip controller for the electronic dispenser.

• Journal of IKEEE
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• v.25 no.3
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• pp.517-527
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• 2021

This paper presents the phase-shift full-bridge DC-DC converter using the one-chip micom. The proposed converter primary is the full-bridge power topology that operates with the unipolar pulse-width modulation (PWM) by the phase-shift method, and the secondary is the full-bridge full-wave rectifier composed of four diodes. The control of proposed converter is performed by the one-chip micom and its MOSFET switches are driven by the bootstrap circuit. Thus the total system of proposed converter is simple. The proposed converter achieves high-efficiency using the resonant circuit and blocking capacitor. In this paper, first, the power-circuit operation of proposed converter is explained according to each operation mode. And the power-circuit design method of proposed converter is shown, and the software control algorithm on the micom and the feedback and switch drive circuits operating the proposed converter are described, briefly. Then, the operation characteristics of proposed converter are validated through the experimental results of a designed and implemented prototype converter by the shown design and implementation method in this paper. The highest efficiency in the results was about 92%.

• Transactions of Materials Processing
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• v.15 no.9 s.90
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• pp.667-672
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• 2006

Agglutination is one of the most commonly employed reactions in clinical diagnosis. In this paper, we have designed and fabricated nickel mold insert for injection molding of a microfluidic lab-on-a-chip for the purpose of the efficient detection of agglutination. In the presented microfluidic lab-on-a-chip, two inlets for sample blood and reagent, flow guiding microchannels, improved serpentine laminating micromixer(ISLM) and reaction microwells are fully integrated. The ISLM, recently developed by our group, can highly improve mixing of the sample blood and reagent in the microchannel, thereby enhancing reaction of agglutinogens and agglutinins. The reaction microwell was designed to contain large volume of about $25{\mu}l$ of the mixture of sample blood and reagent. The result of agglutination in the reaction microwell could be determined by means of the level of the light transmission. To achieve the cost-effectiveness, the microfluidic lab-on-a-chip was realized by the injection molding of COC(cyclic olefin copolymer) and thermal bonding of two injection molded COC substrates. To define microfeatures in the microfluidic lab-on-a-chip precisely, the nickel mold inserts of lab-on-a-chip for the injection molding were fabricated by combining the UV photolithography with a negative photoresist SU-8 and the nickel electroplating process. The microfluidic lab-on-a-chip developed in this study could be applied to various clinical diagnosis based on agglutination.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.11_12
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• pp.629-638
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• 2005

In the System on a Chip design, the on chip bus is one of the critical factors that decides the overall system performance. Especially, in the case or reusing the IPs such as processors, DSPs and multimedia IPs that requires higher bandwidth, the bandwidth problems of on chip bus are getting more serious. Recently ARM proposes the Multi-Layer AHB BusMatrix that is a highly efficient on chip bus to solve the bandwidth problems. The Multi-Layer AHB BusMatrix allows parallel access paths between multiple masters and slaves in a system. This is achieved by using a more complex interconnection matrix and gives the benefit of increased overall bus bandwidth, and a more flexible system architecture. However, there is one clock cycle delay for each master in existing Multi-Layer AHB BusMatrix whenever the master starts new transactions or changes the slave layers because of the Input Stage and arbitration logic realized with Moore type. In this paper, we improved the existing Multi-Layer AHB BusMatrix architecture to solve the one clock cycle delay problems and to reduce the area overhead of the Input Stage. With the elimination of the Input Stage and some restrictions on the arbitration scheme, we tan take away the one clock cycle delay and reduce the area overhead. Experimental results show that the end time of total bus transaction and the average latency time of improved Multi-Layer AHB BusMatrix are improved by $20\%\;and\;24\%$ respectively. in ease of executing a number of transactions by 4-beat incrementing burst type. Besides the total area and the clock period are reduced by $22\%\;and\;29\%$ respectively, compared with existing Multi-layer AHB BusMatrix.

• ETRI Journal
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• v.22 no.4
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• pp.13-24
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• 2000

As more transistors are integrated onto bigger die, an on-chip multiprocessor will become a promising alternative to the superscalar microprocessor that dominates today's microprocessor marketplace. This paper describes key parts of a new on-chip multiprocessor, called Raptor, which is composed of four 2-way superscalar processor cores and one graphic co-processor. To obtain performance characteristics of Raptor, a program-driven simulator and its programming environment were developed. The simulation results showed that Raptor can exploit thread level parallelism effectively and offer a promising architecture for future on-chip multi-processor designs.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1069-1072
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• 1998

Recently the development of design and automation technology and manufacturing method, has reduced the cost of chip, but it becomes more difficult to test IC chip because test technique doesn't keep up with these techniques. In case of IC testing, obtaining test vectors to be able to detect good chip or bad one is very important, but according to increasing complexity, it is very complex and difficult. Another problem is that during testing, there could be capability of physical and electrical damage on chip. Also there is difficulty in synchronization between CUT (circuit under test) and Test equipment〔1〕. Because of these difficulties, built in self test has been proposed. Not only obtaining test vectors but also reducing test time becomes hot issues nowadays. This paper presents a new test BIST(built in self test) method. Proposed BIST implementation reduces test time and obtains high fault coverage. By searching internal nodes in which are inserted test_point_cells〔2〕and allocating TPG(test pattern generation) stages, test length becomes much shorter.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.190-195
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• 2005

The hearing aid chip described in this paper is an analog & digital mixed system. The design focuses on the$\mu$DSP core. This $\mu$DSP core includes internal time delays to two inputs from front and rear microphones. The paper consists of two parts; one is the composure and signal processing algorithm of digital hearing aids and the other is Verilog HDL codes for$\mu$DSP cores. All digital modules in the design were coded and synthesized by Verilog HDL codes which were verified by Mentor Graphics and Synopsis semiconductor chip design tools.