• ETRI Journal
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• v.32 no.4
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• pp.540-547
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• 2010

One of the critical issues in on-chip serial communications is increased power consumption. In general, serial communications tend to dissipate more energy than parallel communications due to bit multiplexing. This paper proposes a low-power bus serialization method. This encodes bus signals prior to serialization so that they are converted into signals that do not greatly increase in transition frequency when serialized. It significantly reduces the frequency by making the best use of word-to-word and bit-by-bit correlations presented in original parallel signals. The method is applied to the revision of an MPEG-4 processor, and the simulation results show that the proposed method surpasses the existing one. In addition, it is cost-effective when implemented as a hardware circuit since its algorithm is very simple.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.602-605
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• 2000

Recently, a study of intellectual smell recognition system is applied for the various fields such as control of food processing and survey of decay. A basic gas recognition system was implemented gases using four metal oxides semiconductor sensors as inputs. A CPLD chip of twenty thousand gates level was used for this purpose. The CPLD chip was designed and the availability of the one chip smell recognition system was tested.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.1 no.2
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• pp.193-197
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• 1997

In this paper, we propose a new PN chip clock generator which employs two synchronous counters to achieve precise phase control of chip clock. In a CDMA code acquisition and tracking system, the PN chip clock is required to operate highly reliable without any glitch even under harsh environment condition such as temperature and voltage fluctu-aliens. The digital implementation of the proposed PN chip clock generator imparts it with much desired reliability. Since the proposed chip clock generator can be easily controlled into one of the states: free running, phase advance, and delay state, it can be applied to data processing as well as code synchronization. We have done FPGA implementation of the proposed logic and have verified its satisfactory operation up to 50 MHz.

• Journal of the Korean Society for Precision Engineering
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• v.7 no.2
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• pp.85-94
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• 1990

In automatic metal cuttings, the chip control is one of the serious problems. So the automatic detection of chip forms is essential to the chip control in automatic metal cuttings. Cutting experiments were carried out under the variety of cutting conditions (cutting speed, feed, depth of cut and tool geometry) and with workpiece made of steel (S45C), and cutting forces were measured in-processing by using a piezoelectric type Tool Dynamometer. In this report, the frequency analysis of dynamic components, the upper frequency distributions, the ratio of RMS values, the numbers of null point and the probability density were calculated from the dynamic componeents of cutting forces filtered through various band pass filters. Experimental results showed that computer chip form monitoring system based on the cutting forces was designed and simulated and that 6 type of chip forms could be detected while in-process machining.

• Journal of the Korean Society for Precision Engineering
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• v.5 no.1
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• pp.84-93
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• 1988

The on-line detection of the chip flow is one of the most important technologies in com- pletly automatic operation of machine tool, such as FMS and Unmanned Factories. This problem has been studied by many researchers, however, it is not solved as yet. For the recognition of chip flow in this study, the dynamic cutting force components due to the chip breaking were measured by dynamometer of piezo-electric type, and the frequency components of cutting force were also analyzed. From the measured results, the effect of cutting conditions and tool geometry on the dynamic cutting force component and chip formation were investigated in addition to the relationships between frequency of chip breaking (fB) and side serrated crack (fC) of chip. As a result, the following conclusions were obtaianed. 1) The chip formations have a large effect on the dynamic cutting force components. When chip breaking takes place, the dynamic cutting force component greatly increases, and the peridoic components appear, which correspond to maximum peak- frequency. 2) The crater wear of tool has a good effect on the chip control causing the chiup to be formed as upward-curl shape. In this case, the dymamic cutting force component greatly increases also 3) fB and fC of chip are closely corelated, and fC of chips has a large effect on the change of the situation of chip flow and dynamic cutting force component. 4) Under wide cutting conditions, the limit value (1.0 kgf) of dynamic cutting force component exists between the broken and continuous chips. Accordingly, this value is suitable for recognition of chip flow in on-line control of the cutting process.

• Journal of Industrial Technology
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• v.22 no.A
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• pp.89-94
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• 2002

In this paper, a Exhaust Flow Controller (EFC) technology for uniform application of film coater and developer device is introduced that spread and remove photo resister at semiconductor manufacturing process. Because developed EFC device uses differential pressure sensing method as a differential flow meter and embodied smart A/D conversion by using a one chip microprocessor and devised by feedback Servo control, It has shown excellent performance and stability evaluation, as maximum 2000L/min flow, capability of installation to actual semiconductor equipment.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.1406-1409
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• 2004

The Resolver usually used in industry is the absolute angle analog sensor that must be in order to driving BLDC (brushless DC) motor, and it needs RDC(Resolver-to-Digital converter) for changing the output signal to digital to be applied to the SVPWM(Space Vector Pulse Width Modulation) algorithm. Commonly used S/W RDC needs trigonometric function. What it takes a lot of calculation time of processor is gotten at weak point. In this paper, S/W RDC is realized except trigonometric functions as a result of feedback resolver outputs after filtering using FIR filter. thus, processing time is reduced. So, One-chip DSP Controller operating the Vector Control, RDC, and SVPWM can be designed.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.468-471
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• 2005

The Air Quality Sensor(AQS), located near the fresh air inlet, serves to reduce the amount of pollution entering the vehicle cabin through the HVAC(heating, ventilating, and air conditioning) system by sending a signal to close the fresh air inlet door/ventilation flap when the vehicle enters a high pollution area. One chip sensor module which include above two sensing elements, humidity sensor and bad odor sensor was developed for AQS (air quality sensor) in automobile. With this sensor module, PIC microcontroller was designed with back propagation neural network to reduce detecting error when the motor vehicles pass through the dense fog area. The signal from neural network was modified to control the inlet of automobile and display the result or alarm the situation. One chip microcontroller, Atmega128L (ATmega Ltd., USA) was used. For the control and display. And our developed system can intelligently detect the bad odor when the motor vehicles pass through the polluted air zone such as cattle farm.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.907-910
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• 2003

We have developed Logic Design Training Kit for studying, actual training, designing of FPGA(Xillinx) or CPLD(ALTERA CPLD), the Digital Logic Device. This training kit has 12 matrix keys, RS232 port for serial communication and uses LED array. six FND(Dynamic), LCD as display part. That is standard specification for digital logic training kit. Special point of this kit is that we make two logic device trainig kit. This two logic device kit have more smaller and simple architecture because only uses one chip. That chip already includes a lot of functions that need for training kit, such as : complex logic circuit needed the two kind of logic devices, 16 way of system clock deviding function, serial communication interrupt....etc. We called that one chip is Center Bridge Chipset ; Xillinx FPGA Spartan2. User can select between using one device of FPGA or CPLD, or uses both them. Because of, Center Bridge Chipset has profitable architecture. it can work as Logic Device's networking with Master-Slave connection When using both logic devices.

• Journal of Advanced Marine Engineering and Technology
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• v.31 no.6
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• pp.777-783
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• 2007

In this work, a highly integrated downconverter MMIC employing HBT(heterojunction bipolar transistor) was developed for application to one chip tranceiver solution of Ku-band commercial wireless communication system. The downconverter MMIC (monolithic microwave integrated circuit) includes mixer filter. amplifier and input/output matching circuit. Especially, spiral inductor structures employing SiN film were used for a suppression of LO and its second harmonic leakage signals. Concretely, they were properly designed so that the self-resonance frequency was accurately tuned to LO and its second harmonic frequency, and they were integrated on the downconverter MMIC.