• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.323-327
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• 2004

The bubble flow from the wafer surface during plating process was studied in this paper. The plating shape in the opening of photoresist becomes gradated shape in the fountain plating system, because bubbles from the wafer surface are difficult to escape from the deep openings, vias. So, we designed the tilted electrode ring contact to get uniform bump height on all over the wafer and evaluated the film uniformity by SEM and ${\alpha}-step$. In ${\alpha}-step$ measurement, film uniformities in the fountain plating system and the tilted electrode ring contact system were ${\pm}16.6%,\;{\pm}4%$ respectively.

• Journal of the Korean Society for Precision Engineering
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• v.24 no.3 s.192
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• pp.140-146
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• 2007

To understand adhesive phenomena, we need to get force curve between two surfaces. And it is said that high stiffness force analysis system is needed to get precise force curve and more information of the surfaces. Usually the stiffness of the force measurement system is under the order of 10N/m. The stiffer force measurement system, however, results in more information on the surface, because higher stiffness lead to the wider range of force curves, secondly because the force curve obtained through the stiffer one describes more precise relationship between relative tip-sample separation and interaction force. In this paper, considering for stiffness and resolution, the cantilever was designed and we made adhesion force measurement apparatus with high stiffness and high resolution, so we measured adhesive force between Ag-ball and wafer.

• Proceedings of the KIEE Conference
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• 1999.11d
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• pp.991-993
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• 1999

The method of measurement for contactless eddy-current conductivity using magnetic dipole field theory was suggested by M.C Chen[1], which calculate the eddy-current caused by exciting coil with Faraday's induction law. In this work, we have developed the apparatus for contactless measurement of conductivity or resistivity with the dipole field theory. The resistivity can be measured from several to a dozen $m{\Omega}{\cdot}cm$ range within maximum 30% error. At the high resistivity range above $100{\Omega}{\cdot}cm$, the standard deviation of measurement was very large as the induced voltage of sensing coil is small so it was difficult to measure the value precisely.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.902-911
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• 2003

Using InGaP/GaAs HBT power cells with a 2.0${\times}$20$\mu\textrm{m}$$^2$ emitter area of a unit HBT, a two stage MMIC power amplifier has been developed for IMT-2000 handsets. An active-bias circuit has been used for temperature compensation and reduction in the idling current. Fitting on measured S-parameters of the HBT cells, circuit elements of HBT's nonlinear equivalent model have been extracted. The matching circuits have been designed basically with the extracted model. A two stage HBT MMIC power amplifier fabricated using ETRI's HBT process. The power amplifier produces an 1-㏈ compressed output power(P$\_$l-㏈/) of 28.4 ㏈m with 31% power added efficiency(PAE) and 23-㏈ power gain at 1.95 GHz in on-wafer measurement. Also, the power amplifier produces a 26 ㏈m output power, 28% PAE and a 22.3-㏈ power gain with a -40 ㏈c ACPR at a 3.84 ㎒ off-center frequency in COB measurement.quency in COB measurement.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2007.06a
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• pp.109-112
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• 2007

In this paper we describe a robust method of improving precision in monitoring high energy ion implantation processes. Ion implant energy accuracy was measured in the device manufacturing process using an unpatterned implanted layer on an intrinsic p-type silicon wafer. To increase Rs sensitivity to energy at the well implant process, a PN junction structure was formed by P-well and deep N-well implants into the p-type Si wafer. It was observed that the depletion layer formed by the PN junction was very sensitive to energy variation of the well implant. Conclusively, it can be recommended to monitor well implant processes using the Rs measurement method described herein, i.e., a PN junction diode structure since it shows excellent Rs sensitivity to variation caused by energy difference at the well implant step.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1101-1106
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• 2005

The purpose of this study was to develop a process management system to manage ingot fabrication and the quality of the ingot. The ingot is the first manufactured material of wafers. Operating data (trace parameters) were collected on-line but quality data (measurement parameters) were measured by sampling inspection. The quality parameters were applied to evaluate the quality. Thus, preprocessing was necessary to extract useful information from the quality data. First, statistical methods were employed for data generation, and then modeling was accomplished, using the generated data, to improve the performance of the models. The function of the models is to predict the quality corresponding to the control parameters. The dynamic polynomial neural network (DPNN) was used for data modeling that used the ingot fabrication data.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.11a
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• pp.7-8
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• 2005

The pseudo MOSFET measurement technique has been a simple and rapid method for characterization of SOI wafers without any device fabrication process. We adopted the pseudo MOSFET technique to examine the surface silicon film thickness dependence of electrical properties of SOI wafer. The measurements showed that turn-on voltage increased and electron mobility decreased as the SOI film thickness was reduced in the SOI film thickness of less than 20 nm region.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1996.11a
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• pp.167-171
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• 1996

Chemical mechanical polishing (CMP) has become widely accepted for the planarization of multi-interconnect structures in semiconductor manufacturing. However, perfect planarization is not so easily achieved because it depends on the pattern sensitivity, the large number of controllable process parameters, and the absence of a reliable process model, etc. In this paper, we realized the planarization of deposited oxide layers followed by metal (W) polishing as a replacement for tungsten etchback process for via formation. Atomic force microscope (AFM) is used for the evaluation of pattern topography during CMP. As a result, AFM evaluation is very attractive compared to conventional methods for the measurement of planarity. Moreover, it will contribute to analyze planarization characteristics and establish CMP model.

• Proceedings of the Korean Powder Metallurgy Institute Conference
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• 2006.09b
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• pp.1128-1129
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• 2006

Currently Chemical Mechanical Planarization (CMP) has become an essential step in the overall semiconductor wafer fabrication technology. Especially the CMP pad conditioner, one of the diamond tools, is required to have strong diamond cohesion. Strong cohesion between diamond and metal matrix prevents macro scratch on the wafer during CMP Process. Typically the diamond tool has been manufactured by sintered, brazed and electro-plated methods. In this paper, some results will be reported of cohesion between diamond and metal matrix of the diamond tools prepared by three different manufacturing methods. The cohesion force of brazed diamond tool is found stronger than the others. This cohesion force is increased in reverse proportion to the contact area of diamond and metal matrix. The brazed diamond tool has a strong chemical combination of the interlayer composed of Cr in metal matrix and C in diamond, which enhance the interfacial cohesion strength between diamonds and metal matrix.

• ETRI Journal
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• v.31 no.6
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• pp.675-679
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• 2009

$Ti_xSi_{1-x}O_y$ (TSO) thin films are fabricated using plasma-enhanced atomic layer deposition. The Ti content in the TSO films is controlled by adjusting the sub-cycle ratio of $TiO_2$ and $SiO_2$. The refractive indices of $SiO_2$ and $TiO_2$ are 1.4 and 2.4, respectively. Hence, tailoring of the refractivity indices from 1.4 to 2.4 is feasible. The controllability of the refractive index and film thickness enables application of an antireflection coating layer to TSO films for use as a thin film solar cell. The TSO coating layer on an Si wafer dramatically reduces reflectivity compared to a bare Si wafer. In the measurement of the current-voltage characteristics, a nonlinear coefficient of 13.6 is obtained in the TSO films.