• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.859-862
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• 1998

An offset compensation scheme for rail-to-rail CMOS op-amps with complementary input stages is presented. Two auxiliary amplifiers are used to compensate for the offsets of NMOS and PMOS differnetial input stages, and ping-pong control is employed for continuous-time operation. Simulation and measurements resutls show that offsets are reduced about 20 times by this scheme.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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• pp.67-68
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• 2000

Polycrystalline silicon (poly-Si) thin film transistors (TFT's) employing vertical amorphous silicon (a-Si) offsets have been fabricated without additional photolithography processes. The a-Si offset has been formed utilizing the poly-Si grain growth blocking effect by thin native oxide film during the excimer laser recrystallization of a-Si. The ON current degradation of the new device after 4 hour's electrical stress was reduced by 5 times compared with conventional poly-Si TFT's.

• 국방과기술
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• 5호통권87호
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• pp.16-23
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• 1986

• 한국통신학회논문지
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• 제23권4호
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• pp.914-925
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• 1998

본 논문은 코드분할다중접속 순방향 링크에서 파일롯 선호가 존재하는 경우 하이브리드 동기 획득에 대한 성능을 평가한다. 하이브리드 동기 획득 방식은 병렬 및 직렬 동기 획득 방식의 결합된 형태이다. 제안된 동기 획득 방식의 성능 평가는 평균 동기 획득 시간에 의해 이루어지는데 평균 동기 획득 시간은 두 가지 유형(유형 1, 2)을 고려하여 유도하였다. 여기서 유형l은 정확한 코드 위상 오프셋들이 하나의 부분 탐색 구간에 모두 포함되어 있는 경우이고 유형 2는 정확한 코드 위상 오프셋틀이 두개의 부분 탐색 구간에 분포되어 있는 경우이다. 또한 신호 검출, 오경보, 그리고 miss 확률들은 다경로 페이딩과 다수의 정확한 코드 위상 오프셋이 존재하는 상황을 고려하여 유도하였다. 수치해석 결과는 탐색 및 확인 모드에서의 후치 검출 적분 길이, 부분 탐색 구간 크기, 그리고 동기 획득 시간에 따른 I/Q 넌코히런트 상관기의 수 등의 시스템 설계 파라미터에 대한 하이브리드 동기 획득 성능을 분석하고, 하이브리드 및 병렬 동기 획득에 동일한 하드웨어를 적용했을 경우에 대하여 동기 획득 시간의 관점에 서 두 가지의 동기 획득 시스템의 성능을 비교하였다.

• 정보처리학회논문지C
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• 제16C권2호
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• pp.229-236
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• 2009

WPAN에서는 해상도가 높은 UWB 신호를 사용하여 노드 간의 거리를 추정하고 이로부터 이동노드의 위치를 추정한다. 비동기 거리추정 방식은 고정노드와 이동노드 간에 비동기 상태에서 노드간의 거리를 추정하는 바 각 노드 국부클럭의 주파수 차이에 의한 영향이 심각하다. 고속 UWB에서는 각 노드 국부클럭의 주파수 차이에 의한 영향을 감소시키기 위하여 비동기 TWR 방식을 연속으로 수행하고, 상대주파수 편이 보상방안을 제시하고 있다. 본 논문에서는 고속 UWB의 상대주파수 편이 보상 수식을 완성하고, 이를 적용하는데 대한 문제점을 분석하고, 정확한 주파수편이 보상 방안을 제안한다. 거리추정 방식은 원래의 TWR, 상대주파수 편이 보상 및 정확한 주파수 편이 보상 방식에 의한 TWR에 대하여 시뮬레이션으로 성능을 분석하였다. 상대주파수편이 방식과 정확한 주파수편이 방식은 잡음이 없는 상태에서는 유사한 성능을 나타내었다. 제안된 정확한 주파수 편이 방식은 SNR이 열악한 환경에서 상대주파수 편이 보상 방식보다 정확한 거리를 추정하는 것을 확인하였다.

• 제어로봇시스템학회논문지
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• 제19권2호
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• pp.125-130
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• 2013

Compared to OWR (One-Way Ranging) method that requires precise network time synchronization, TWR (Two-Way Ranging) method has advantages in building an indoor WPAN (Wireless Personal Area Network) location system with lower cost. However, clock offsets of nodes in WPAN system should be eliminated or compensated to improve location accuracy of the TWR method. Because conventional clock offset elimination methods requires multiple TWR transactions to reduce clock offset, they produce network traffic burden instead. This paper presents a clock offset estimation method that can reduce clock offset error with a single TWR transaction. After relative clock offsets of sensor nodes are estimated, clock offsets of mobile tags are estimated using a single TWR communication. Simulation results show that location accuracy of the proposed method is almost similar to the conventional clock offset elimination method, while its network traffic is about a half of the conventional method.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제49권1호
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• pp.24-29
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• 2000

We propose a simple method to control the crystallization depth of amorphous silicon (a-Si) deposited by PECVD or LPCVD during the excimer laser annealing (ELA). Employing the new method, we have formed poly-Si/a-Si double film and fabricated a new poly-Si TFT with vertical a-Si offsets between the poly-Si channel and the source/drain of TFT without any additional photo-lithography process. The maximum leakage current of the new poly-Si TFT decreased about 80% due to the highly resistive vertical a-Si offsets which reduce the peak electric field in drain depletion region and suppress electron-hole pair generation. In ON state, current flows spreading down through broad a-Si cross-section in the vertical a-Si offsets and the current density in the drain depletion region where large electric field is applied is reduced. The stability of poly-Si TFT has been improved noticeably by suppressing trap state generation in drain region which is caused by high current density and large electric field. For example, ON current of the new TFT decreased only 7% at a stress condition where ON current of conventional TFT decreased 89%.

• 천문학회보
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• 제39권2호
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• pp.58.1-58.1
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• 2014

Energetic gas outflows from active galactic nuclei (AGNs) may have a crucial role in galaxy evolution. In this contribution, we present a census of ionized gas outflows using a large sample (~23,000) of local (z < 0.1) type-2 AGNs selected from the Sloan Digital Sky Survey DR 7. By measuring the velocity offset of narrow emission lines, i.e., [O III] ${\lambda}5007$ and the Balmer lines, with respect to the systemic velocity measured from the stellar absorption lines, we find ~47% of AGNs showing an [O III] line-of-sight velocity offset ${\geq}20km\;s-1$. The fraction in type-2 AGNs is similar to that in type-1 AGNs after considering the projection effect. AGNs with larger [O III] velocity offsets, in particular with no or weak $H{\alpha}$ velocity offsets, tend to have higher Eddington ratios, implying that the [O III] velocity offset is related to on-going black hole activity. Also, we find the different distributions of the host galaxy inclination between the AGNs with blueshifted [O III] and the AGNs with redshifted [O III], supporting the model of biconical outflow with dust obscuration. Meanwhile, for ~3% of AGNs, [O III] and $H{\alpha}$ exhibit comparable large velocity offsets, suggesting a more complex gas kinematics than decelerating outflows in the narrow-line region.

• Journal of Communications and Networks
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• 제10권2호
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• pp.148-155
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• 2008

In wireless data communication systems, retransmission of an erroneous packet is inevitable due to the harsh communication environment. In this paper, an efficient retransmission scheme using cooperation from neighboring nodes is investigated. In the cooperative retransmission scheme, an erroneous packet is transmitted to the destination by cooperative nodes which have favorable channels. This cooperative retransmission scheme requires no a priori information of neighboring nodes and has no limitation on the number of cooperating nodes. Distributed beamforming is used to accommodate multiple cooperating nodes. Phase and frequency offsets of cooperating signals are extracted from the NACK message and used to co-phase retransmitted data packets. The outage probability of the cooperative retransmission scheme is analyzed for the case of perfect synchronization and when the offsets are estimated. To reduce the impact of the residual phase and frequency offsets in cooperating signals, a low-rate feedback scheme is also investigated. It is shown that improved outage probability and reduced packet error rate (PER) performance can be achieved even for long data packets. The proposed cooperative retransmission scheme is found to outperform simple retransmission by the source as well as decode-and-forward cooperation.

• Journal of Power Electronics
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• 제17권5호
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• pp.1231-1243
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• 2017

Grid-interactive power converters are normally synchronized with the grid using phase-locked loops (PLLs). The performance of the PLLs is affected by the non-ideal conditions in the sensed grid voltage such as harmonics, frequency deviations and the dc offsets in single-phase systems. In this paper, a single-phase PLL is presented to mitigate the effects of these non-idealities. This PLL is based on the popular second order generalized integrator (SOGI) structure. The SOGI structure is modified to eliminate the effects of input dc offsets. The resulting SOGI structure has a high-pass filtering property. Hence, this PLL is termed as a high-pass generalized integrator based PLL (HGI-PLL). It has fixed parameters which reduces the implementation complexity and aids in the implementation in low-end digital controllers. The HGI-PLL is shown to have the lowest resource utilization among the SOGI based PLLs with dc cancelling capability. Systematic design methods are evolved leading to a design that limits the unit vector THD to within 1% for given non-ideal input conditions in terms of frequency deviation and harmonic distortion. The proposed designs achieve the fastest transient response. The performance of this PLL has been verified experimentally. The results agree with the theoretical prediction.