• 한국정보통신학회논문지
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• 제9권3호
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• pp.638-646
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• 2005

최근 무선통신시스템에서 직접변환 트랜시버 또는 IF 샘플링 SDR 기반 수신기가 일반적인 트랜시버 구조에 상응하여 설계되어지고 있다. 일반적인 AFC/APC 보상 회로가 기저 대역에서 RF 입력 신호와 국부발진 신호의 주파수 및 위상 오차를 보정할지라도 직접변환 수신 구조에서는 주요한 열화요소로 작용한다. 일반적인 보상 회로의 제한적인 동작 영역과 기저 대역에서의 1/Q 채널의 불평형을 용이하게 보상할 수 있도록 RF 입력 신호단에서 주파수 및 위상 오차를 보정하는 방법을 본 논문에서 제안한다. RF 입력단에서 고정된 주파수 및 위상 오차 이외에 변화하는 주파수 및 위상 오차를 제안된 early-late 보상기에 의해 효과적으로 보상할 수 있다. RF 입력단에서의 주파수 및 위상 오차의 보정으로 직접변환 수신기의 기저 대역에서의 기존 주파수 및 위상 오차 보정 회로는 간단히 설계할 수 있으며 미세한 오차 보정 구조로 용이하게 이용할 수 있다.

• 한국통신학회논문지
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• 제28권4C호
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• pp.384-391
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• 2003

Blind channel identification and equalization attempt to identify the communication channel and to remove the inter-symbol interference caused by a communication channel without using any known trainning sequences. In this paper, we propose a blind adaptive channel identification and equalization algorithm with phase offset compensation for single-input multiple-output (SIMO) channel. It is based on the one-step forward multichannel linear prediction error method and can be implemented by an RLS algorithm. Phase offset problem, we use a blind adaptive algorithm called the constant modulus derotator (CMD) algorithm based on condtant modulus algorithm (CMA). Moreover, unlike many known subspace (SS) methods or cross relation (CR) methods, our proposed algorithms do not require channel order estimation. Therefore, our algorithms are robust to channel order mismatch.

• Journal of electromagnetic engineering and science
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• 제4권2호
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• pp.72-78
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• 2004

In this paper, we evaluate the performance of the digital modulation schemes described in the APCO Project 25 FDMA specifications which can be used for applying the ultra-narrowband technology to the current domestic simple two-way radio systems, and discuss difficulties in the DSP implementation of the systems. We analyze the effect on the systems' BER performance of receiver non-matched filter and frequency-offset between the transmitter and receiver oscillators. And we present a frequency offset compensation method for improving the system performance. The results of performance analysis showed that the CQPSK of APCO Project 25 using non-matched filter degraded the BER by 0.5～1.0 ㏈ comparing with PI/4 DQPSK using matched filter. In the event of 2 % frequency offset, about 1 ㏈ performance loss was produced at the BER of $$10^{-3}TEX>. With the frequency-offset compensation method implemented in the systems using phase recovery scheme of PSK synchronization detection, the performance degradation of about 1.0 ㏈ was occurred at the BER of $$10^{-3}TEX> for 10 % of frequency offset. The proposed method can be used for the improvement of system performance.

• 조명전기설비학회논문지
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• 제27권7호
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• pp.29-36
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• 2013

In this paper, a new DC offset elimination filter is proposed for an accurate phasor extraction of fundamental frequency component. The proposed method can eliminate a DC offset component which is decayed exponentially. The proposed method uses only one cycle of data for phasor extraction computation, which does not need to preset the time constant of the DC offset component. Also, the other advantages of the proposed method is that gain compensation or phase compensation is not required after filtering. Simulations using ATP were performed to evaluate the performance of the proposed filter method, and the results were compared to the ones obtained by conventional methods.

• 한국태양에너지학회 논문집
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• 제33권6호
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• pp.92-97
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• 2013

This paper proposes DC offset current compensation method of transformerless fuel cell/PV PCS. DC offset current is generated by the unbalanced internal resistance of the switching devices in full bridge topology. The other cause is the sensitivity of the current sensor, which is lower than DSP in resolution. If power converter system has these causes, the AC output current in the inverter will generate the DC offset. In case of transformerless grid-connected inverter system, DC offset current is fatal to grid-side, which results in saturating grid side transformer. Several simulation results show the difficulties of detecting DC offset current. Detecting DC offset current method consists of the differential amplifiers and PWM is compensated by the output of the Op amp circuit with integrator controller. PSIM simulation verifies that the proposed method is simpler and more effective than using low resolution current sensor alone.

• Journal of Electrical Engineering and Technology
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• 제1권3호
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• pp.279-286
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• 2006

A method for estimating the instantaneous phasor of a fault current signal is proposed for high-speed distance protection that is immune to a DC-offset. The method uses a modified notch filter in order to eliminate the power frequency component from the fault current signal. Since the output of the modified notch filter is the delayed DC-offset, delay compensation results in the same waveform as the original DC-offset. Subtracting the obtained DC-offset from the fault current signal yields a sinusoidal waveform, which becomes the real part of the instantaneous phasor. The imaginary part of the instantaneous phasor is based on the first difference of the fault current signal. Since a DC-offset also appears in the first difference, the DC-offset is removed trom the first difference using the results of the delay compensation. The performance of the proposed method was evaluated for a-phase to ground faults on a 345kV 100km overhead transmission line. The Electromagnetic Transient Program was utilized to generate fault current signals for different fault locations and fault inception angles. The performance evaluation showed that the proposed method can estimate the instantaneous phasor of a fault current signal with high speed and high accuracy.

• 대한전자공학회논문지TC
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• 제47권10호
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• pp.49-56
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• 2010

이 논문에서는 pipeline CORDIC(COordinate Rotation DIgital Computer)을 이용한 저전력 주파수 옵셋 동기화기 구조를 제안하였다. 주파수 옵셋 동기화기의 핵심 블록은 주파수 옵셋 추정부와 보상부이다. 제안된 주파수 옵셋 추정부에서는 sequential CORDIC을 사용하여 구현면적을 감소시켰으며 한번에 2 단계씩 CORDIC을 수행하는 방식을 사용하여 연산 속도를 높였다. 또한 제안된 주파수 옵셋 보상부에서는 pipeline CORDIC을 사용하여 구현면적을 줄임과 동시에 계산 속도를 향상시킬 수 있었다. MatLab을 사용하여 제안 구조가 주파수 옵셋을 추정 및 보상하는 function을 검증하였다. 제안 구조에 대하여 Verilog-HDL로 코딩하고 Synopsys tool을 사용하여 합성하여 구현면적을 실험하였다.

• 한국태양에너지학회 논문집
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• 제37권6호
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• pp.1-12
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• 2017

The DC link of Grid-Connected 3-Phase 3-Level T-type Photovoltaic PCS (PV-PCS) consists of two series connected capacitors for using their neutral voltage. The mismatch between two capacitor characteristics and transient states happened in load change cause the imbalance of neutral voltage. As a result, PV-PCS performance is degraded and the system becomes unstable. In this paper, a mathematical model for analyzing the imbalance of neutral voltage is derived and a compensation method using offset voltage is proposed, where offset voltage adjusts the applying time of P-type and N-type small vectors. The validity of the proposed methods is verified by simulation and experiment.

• Journal of Electrical Engineering and Technology
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• 제9권2호
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• pp.532-540
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• 2014

It is necessary to measure the current of rotor for controlling the active and reactive power generated by the stator side of the doubly fed induction generator (DFIG) system. There are offset and scaling errors in the current measurement. The offset and scaling errors cause one and two times current ripples of slip frequency in the synchronous reference frame of vector control, respectively. This paper proposes a compensation method to reduce their ripples. The stator current is variable according to the wind force but the rotor current is almost constant. Therefore input of the rotor current is more useful for a compensation method. The proposed method adopts the synchronous d-axis current of the rotor as the input signal for compensation. The ripples of the measurement errors can be calculated by integrating the synchronous d-axis stator current. The calculated errors are added to the reference current of rotor as input of the current regulator, then the ripples are reduced. Experimental results show the effectiveness of the proposed method.

• Journal of Power Electronics
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• 제14권1호
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• pp.82-91
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• 2014

This paper proposes a compensation algorithm for the analog rotor position errors caused by nonideal sinusoidal encoder output signals including offset and gain errors. In order to achieve a much higher resolution, position sensors such as resolvers or incremental encoders can be replaced by sinusoidal encoders. In practice, however, the periodic ripples related to the analog rotor position are generated by the offset and gain errors between the sine and cosine output signals of sinusoidal encoders. In this paper, the effects of offset and gain errors are easily analyzed by applying the concept of a rotating coordinate system based on the dq transformation method. The synchronous d-axis signal component is used directly to detect the amplitude of the offset and gain errors for the proposed compensator. As a result, the offset and gain errors can be well corrected by three integrators located on the synchronous d-axis component. In addition, the proposed algorithm does not require any additional hardware and can be easily implemented by a simple integral operation. The effectiveness of the proposed algorithm is verified through several experimental results.