• 제목/요약/키워드: nonvolatile memory

검색결과 252건 처리시간 0.03초

Resistive Switching Properties of N and F co-doped ZnO

  • Kim, Minjae;Kang, Kyung-Mun;Wang, Yue;Chabungbam, Akendra Singh;Kim, Dong-eun;Kim, Hyung Nam;Park, Hyung-Ho
    • 마이크로전자및패키징학회지
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    • 제29권2호
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    • pp.53-58
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    • 2022
  • One of the most promising emerging technologies for the next generation of nonvolatile memory devices based on resistive switching (RS) is the resistive random-access memory mechanism. To date, RS effects have been found in many transition metal oxides. However, no clear evidence has been reported that ZnO-based resistive transition mechanisms could be associated with strong correlation effects. Here, we investigated N, F-co-doped ZnO (NFZO), which shows bipolar RS. Conducting micro spectroscopic studies on exposed surfaces helps tracking the behavioral change in systematic electronic structural changes during low and high resistance condition of the material. The significant difference in electronic conductivity was observed to attribute to the field-induced oxygen vacancy that causes the metal-insulator Mott transition on the surface. In this study, we showed the strong correlation effects that can be explored and incorporated in the field of multifunctional oxide electrons devices.

비정질실리콘 박막트랜지스터 비휘발성 메모리소자 (The nonvolatile memory device of amorphous silicon transistor)

  • 허창우;박춘식
    • 한국정보통신학회논문지
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    • 제13권6호
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    • pp.1123-1127
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    • 2009
  • 본 연구는 비정질실리콘 박막트랜지스터를 비휘발성 메모리소자로 제작함으로써 스위칭 소자로 사용되는 박막 트랜지스터(TFT)의 응용범위를 확대시키고, 비정질 실리콘 사용에 따라 대면적화에 적합하고 아울러 값싼 기판을 사용할 수 있게 한 비정질 실리콘 비휘발성 메모리소자에 관한 것이다. 이와 같은 본 연구는 유리기판과 그 유리기판위에 증착시켜 패터닝한 게이트, 그 게이트를 덮어씌운 제1 절연층, 그 제1 절연층위에 증착시켜 패터닝한 플로우팅 게이트와 그 플로우팅 게이트를 덮어씌운 제2 절연층, 그 제2 절연층위에 비정질실리콘을 증착시킨 액티브층과 그 액티브층위에 n+ 비정질실리콘을 증착시켜 패터닝한 소오스/드레인층 그리고 소오스/드레인층 위에 증착시킨 소오스/드레인층 전극으로 비정질실리콘 박막트랜지스터 비휘발성 메모리소자를 구성한다.

Self-sustained n-Type Memory Transistor Devices Based on Natural Cellulose Paper Fibers

  • Martins, Rodrigo;Pereira, Luis;Barquinha, Pedro;Correia, Nuno;Goncalves, Goncalo;Ferreira, Isabel;Dias, Carlos;Correia, N.;Dionisio, M.;Silva, M.;Fortunato, Elvira
    • Journal of Information Display
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    • 제10권4호
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    • pp.149-157
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    • 2009
  • Reported herein is the architecture for a nonvolatile n-type memory paper field-effect transistor. The device was built via the hybrid integration of natural cellulose fibers (pine and eucalyptus fibers embedded in resin with ionic additives), which act simultaneously as substrate and gate dielectric, using passive and active semiconductors, respectively, as well as amorphous indium zinc and gallium indium zinc oxides for the gate electrode and channel layer, respectively. This was complemented by the use of continuous patterned metal layers as source/drain electrodes.

Electrical characteristics of SiC thin film charge trap memory with barrier engineered tunnel layer

  • Han, Dong-Seok;Lee, Dong-Uk;Lee, Hyo-Jun;Kim, Eun-Kyu;You, Hee-Wook;Cho, Won-Ju
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2010년도 제39회 하계학술대회 초록집
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    • pp.255-255
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    • 2010
  • Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

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High Performance Flexible Inorganic Electronic Systems

  • 박귀일;이건재
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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    • pp.115-116
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    • 2012
  • The demand for flexible electronic systems such as wearable computers, E-paper, and flexible displays has increased due to their advantages of excellent portability, conformal contact with curved surfaces, light weight, and human friendly interfaces over present rigid electronic systems. This seminar introduces three recent progresses that can extend the application of high performance flexible inorganic electronics. The first part of this seminar will introduce a RRAM with a one transistor-one memristor (1T-1M) arrays on flexible substrates. Flexible memory is an essential part of electronics for data processing, storage, and radio frequency (RF) communication and thus a key element to realize such flexible electronic systems. Although several emerging memory technologies, including resistive switching memory, have been proposed, the cell-to-cell interference issue has to be overcome for flexible and high performance nonvolatile memory applications. The cell-to-cell interference between neighbouring memory cells occurs due to leakage current paths through adjacent low resistance state cells and induces not only unnecessary power consumption but also a misreading problem, a fatal obstacle in memory operation. To fabricate a fully functional flexible memory and prevent these unwanted effects, we integrated high performance flexible single crystal silicon transistors with an amorphous titanium oxide (a-TiO2) based memristor to control the logic state of memory. The $8{\times}8$ NOR type 1T-1M RRAM demonstrated the first random access memory operation on flexible substrates by controlling each memory unit cell independently. The second part of the seminar will discuss the flexible GaN LED on LCP substrates for implantable biosensor. Inorganic III-V light emitting diodes (LEDs) have superior characteristics, such as long-term stability, high efficiency, and strong brightness compared to conventional incandescent lamps and OLED. However, due to the brittle property of bulk inorganic semiconductor materials, III-V LED limits its applications in the field of high performance flexible electronics. This seminar introduces the first flexible and implantable GaN LED on plastic substrates that is transferred from bulk GaN on Si substrates. The superb properties of the flexible GaN thin film in terms of its wide band gap and high efficiency enable the dramatic extension of not only consumer electronic applications but also the biosensing scale. The flexible white LEDs are demonstrated for the feasibility of using a white light source for future flexible BLU devices. Finally a water-resist and a biocompatible PTFE-coated flexible LED biosensor can detect PSA at a detection limit of 1 ng/mL. These results show that the nitride-based flexible LED can be used as the future flexible display technology and a type of implantable LED biosensor for a therapy tool. The final part of this seminar will introduce a highly efficient and printable BaTiO3 thin film nanogenerator on plastic substrates. Energy harvesting technologies converting external biomechanical energy sources (such as heart beat, blood flow, muscle stretching and animal movements) into electrical energy is recently a highly demanding issue in the materials science community. Herein, we describe procedure suitable for generating and printing a lead-free microstructured BaTiO3 thin film nanogenerator on plastic substrates to overcome limitations appeared in conventional flexible ferroelectric devices. Flexible BaTiO3 thin film nanogenerator was fabricated and the piezoelectric properties and mechanically stability of ferroelectric devices were characterized. From the results, we demonstrate the highly efficient and stable performance of BaTiO3 thin film nanogenerator.

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플래시 메모리상에서 시스템 소프트웨어의 효율적인 버퍼 페이지 교체 기법 (An Efficient Buffer Page Replacement Strategy for System Software on Flash Memory)

  • 박종민;박동주
    • 한국정보과학회논문지:데이타베이스
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    • 제34권2호
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    • pp.133-140
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    • 2007
  • 플래시 메모리는 오늘날 다양한 형태로 우리 생활의 일부를 차지하고 있다. 이동식 저장매체, 유비쿼터스 컴퓨팅 환경과 휴대전화기, MP3플레이어, 개인정보단말기(PDA) 등의 모바일 제품 등에 광범위하게 사용되고 있다. 이처럼 많은 분야에서 사용되는 주된 이유는 플래시 메모리가 저전력, 비휘발성, 고성능, 물리적 안정성, 휴대성 등의 장점을 갖기 때문이다. 더불어 최근에는 기가바이트급 플래시 메모리도 개발되어 하드디스크의 자리를 대체할 수 있는 상황에 이르렀다. 하지만, 플래시 메모리는 하드디스크와 달리 이미 데이타가 기록된 섹터에 대해 덮어쓰기가 되지 않는다는 특성을 갖고 있다. 데이타를 덮어쓰기 위해서는 해당 섹터가 포함된 블록을 지우고(소거) 쓰기 작업을 수행해야 한다. 이로 인해 플래시 메모리의 데이타 읽기/쓰기/소거에 비용이 하드 디스크와 같이 동일한 것이 아니라 각각 다르다[1][5][6]. 이러한 특성이 고려되지 않은 기존의 OS, DBMS 등과 같은 시스템 소프트웨어에서 사용되는 교체 기법은 플래시 메모리 상에서 비효율성을 가질 수 있다. 그러므로 플래시 메모리상에서는 플래시 메모리의 특성을 고려한 효율적인 버퍼 교체 기법이 필요하다. 본 논문에서는 플래시 메모리의 특성을 고려한 버퍼 페이지 교체기법을 제안하며, 제안된 기법과 기존 기법들과의 성능 평가를 수행한다. 지프분포와 실제 워크로드를 사용한 성능평가는 플래시 메모리의 특성을 고려한 버퍼 페이지 교체 기법의 필요성을 입증한다.

나노 적층 구조를 응용한 저항성 기반 비휘발성 메모리 소자 특성 제어 (Control of Charge Transports in Nonvolatile Resistive Memory Devices through Embedded Nanoscale Layers)

  • 유일환;황진하
    • 한국세라믹학회지
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    • 제46권3호
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    • pp.336-343
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    • 2009
  • Nickel oxide thin films exhibit the resistive switching as a function of applied voltages. The switching phenomena involve low and high resistance states after electroforming. The electrical features are believed to be associated with the formation and rupture of filaments. The set and reset behaviors are controlled by the oxidation and reduction of filaments. The indirect evidence of filaments is corroborated by the presence of nanocrystalline nickel oxides found in high-resolution transmission electron microscopy. The insertion of insulating layers seems to control the current-voltage characteristics by preventing the continuous formation of conductive filaments, potentially leading to artificial control of resistive behaviors in NiO-based systems.

실리콘 산화막의 트랩 밀도에 관한 연구 (A study on the Trap Density of Silicon Oxide)

  • 김동진;강창수
    • 전자공학회논문지T
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    • 제36T권1호
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    • pp.13-18
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    • 1999
  • 본 논문은 서로 두께가 다른 실리콘 산화막의 스트레스 바이어스에 의한 트랩밀도를 조사하였다. 스트레스 바이어스에 의한 트랩밀도는 인가 시간 동안의 전류와 인가 후의 전류로 구성되어 있다. 인가 시간 동안의 트랩밀도는 직류 전류로 구성되었으며 인가 후의 트랩 밀도는 계면에서 트랩의 충전과 방전에 의한 터널링에 희해 야기되었다. 스트레스 인가 동안의 트랩밀도는 산화막 두께의 한계를 평가하는데 사용되며 스트레스 인가 후의 트랩밀도는 비휘발성 기억소자의 데이터 유지 특성을 평가하는데 사용된다.

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조성 변화에 따른 P(VDF-TrFE) 박막의 특성 (Characteristics of P(VDF-TrFE) copolymer film with composition variation)

  • 정순원;윤성민;강승열;유병곤
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.125-125
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    • 2009
  • 유기물 강유전체 재료를 이용한 비휘발성 메모리에 대한 연구가 활발하게 진행되고 있다. 현재까지 알려진 대표적인 재료는 P(VDF-TrFE)이다. P(VDF-TrFE)는 결정화 온도가 낮기 때문에 저온공정이 가능하여 향 후 플렉서블 소자 응용에도 유망하다. 최근의 연구결과에서는 고유전율의 절연층을 삽입함으로써 누설전류를 감소시켜, 저전압에서 우수한 강유전성이 얻어질이 보고되고 있다. 본 논문에서는 P(VDF-TrFE)의 조성 변화를 통하여 최적의 강유전성이 얻어지는 조건을 찾고자 노력하였으며, 조성 변화에 따른 구조적, 전기적 특성에 대하여 보고한다.

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플라즈마 원자층증착법에 의해 제조된 강유전체 SrBi2Ta2O9박막의 특성 (Characteristics of Ferroelectric SrBi2Ta2O9 Thin Films deposited by Plasma-Enhanced Atomic Layer Deposition)

  • 신웅철;류상욱;유인규;윤성민;조성목;이남열;유병곤;이원재;최규정
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2003년도 춘계학술발표강연 및 논문개요집
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    • pp.35-35
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    • 2003
  • Recent progress in the integration of the ferroelectric random access memories (FRAM) has attracted much interest. Strontium bismuth tantalate(SBT) is one of the most attractive materials for use in nonvolatile-memory applications due to low-voltage operations, low leakage current, and its excellent fatigue-free property. High-density FRAMs operated at a low voltage below 1.5V are applicable to mobile devices operated by battery. SBT films thinner than 0.1 #m can be operated at a low voltage, because the coercive voltage (Vc) decreases as the film thickness is reduced. In addition, the thickness of the SBT film will have to be reduced so it can fit between adjacent storage nodes in a pedestal type capacitor in future FRAMs.

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