• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.11a
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• pp.13-17
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• 1996

Superthin ONO ( oxide -nitride - oxide ) structures were fabricated for the MONOS nonvolatile memory device with a 20$\AA$ tunneling oxide, 40$\AA$ nitride and 40$\AA$ blocking oxide. The compositions of each layer in a superthin ONO structure were investigated. Also, the characteristics of trap related to the memory quality were examined.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2001.06a
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• pp.1-2
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• 2001

• Journal of the Korean Society for Heat Treatment
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• v.19 no.2
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• pp.83-89
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• 2006

The surface phase changes, the hardness variations, the nitrogen contents and the corrosion resistances of 17-4 PH stainless steel have been investigated after nitrogen permeation(solution nitriding) at a temperature ranges from $1050^{\circ}C$ to $1150^{\circ}C$ The phases appeared at the nitrogen-permeated surface layer were shown to martensite plus austenite and austenite, depending on the variation of nitrogen and chromium contents. And the surface hardness was also depended on the phases appeared at the surface layer from 370 Hv to 220 Hv. The precipitates exhibited at the nitrogen-permeated surface layer were niobium nitride, niobium chromium nitride and carbo-nitride in the austenite and martensite matrices. The surface nitrogen contents were followed by the Cr contents of the surface layers, representing 0.55% at the temperatures of $1050^{\circ}C$ and $1150^{\circ}C$ respectively, and 0.96% at $1100^{\circ}C$ at the distances of $60{\mu}m$ from the outmost surface. From the comparison of the corrosion resistances between nitrogen-permeated and solution-annealed steels, nitrogen permeation remarkably improved the corrosion resistance in the solution of 1 N $H_2SO_4$ due to the increase of nitrogen content in the surface austenite phase.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.1
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• pp.981-984
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• 2005

This study is to realize its threshold voltage shift after programming operation in charge trap type SONOS memory by simulation. SONOS devices are charge trap type nonvolatile memory devices in which charge storage takes place in traps in the nitride-blocking oxide interface and the nitride layer. For simulation of their threshold voltage as a function of the memory states, traps in the nitride layer have to be defined. However, trap models in the nitride layer are not developed in commercial simulator. So, we propose a new method that can simulate their threshold voltage shift by an amount of charges induced to the electrodes as a function of a programming voltages and times as define two electrodes in the tunnel oxide-nitride interface and the nitride-blocking oxide interface of SONOS structures.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.02a
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• pp.395-395
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• 2011

일반적으로 태양전지에서 anti-reflection layer는 조사되는 태양 광을 좀 더 많이 사용하기 위하여 nitride나 oxide와 같은 막을 표면에 형성한다. 본 연구는 이 anti-reflection으로 사용되는 nitride와 oxide의 각각의 두께와 굴절률 변화에 따른 특성변화를 SILVACO를 이용하여 전산모사하고 그 특성변화를 분석하였다. Anti-reflection layer가 없을 경우에는 조사된 빛에 따른 available photo current 활용이 낮았으며, 특히 그 경향은 단파장영역에서 두드러지게 나타났다. 따라서 anti-reflection layer의 최적화를 위해서 두께를 가변하여 available photo current를 분석하였으며, 각 물질의 굴절률 변화 및 이중층 구조의 anti-reflection layer를 형성하고 특성변화를 분석함으로써 최적화하였다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.1
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• pp.1-7
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• 2000

The SNOSFET memory devices with ultrathin ONO(tunnel oxide-nitride-blocking oxide) gate dielectric were fabricated using n-well CMOS process and investigated its characteristics. The thicknesses of tunnel oxide, nitride and blocking oxide were $23{\AA},\; 53{\AA}\; and\; 33{\AA}$, respectively. Auger analysis shows that the ONO layer is made up of $SiO_2(upper layer of blocking oxide)/O-rich\; SiO_x\N\_y$. It clearly shows that the converting layer with $SiO_x\N\_y(lower layer of blocking oxide)/N-rich SiO_x\N\_y(nitride)/O-rich SiO_x\N\_y(tunnel oxide)$. It clearly shows that the converting layer with $SiO_x\N\_y$ phase exists near the interface between the blocking oxide and nitride. The programming condition of +8 V, 20 ms, -8 V, 50 ms is determined and data retention over 10 years is obtained. Under the condition of 8 V programming, it was confirmed that the modified Fowler-Nordheim tunneling id dominant charge transport mechanism. The programmed threshold voltage is distributed less than 0.1 V so that the reading error of memory stated can be minimized. An $8\times8$ NAND type flash EEPROM with SONOSFET memory cell was designed and simulated with the extracted SPICE parameters. The sufficient read cell current was obtained and the upper limit of $V_{TH}$ for write state was over 2V.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.8
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• pp.59-63
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• 2015

This paper discusses the capacitance-voltage method in Metal-Oxide-Nitride-Oxide-Silicon (MONOS) devices to analyzed the characteristics of the top oxide/nitride, nitride/bottom oxide interface trap distribution. In the CV method, nitride trap density can be calculated based on the program characteristics of the nitride thickness variations. By applying this method, silicon rich nitride device found to have a larger trap density than stoichiometric nitride device. This result is consistent with previous studies. If this comparison analysis can be expected to result in improved reliability of the SONOS flash memory.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.04b
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• pp.3-6
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• 2009

Aluminum nitride (AIN) thin films were deposited on a polycrystalline 3C-SiC intermediate layer by a pulsed reactive magnetron sputtering system. Characteristics of the AIN/SiC heterostructures were investigated by field emission scanning electron microscopy (FE-SEM), atomic force microscopy (AFM), X-ray diffraction (XRD), and Fourier transform infrared spectroscopy (FT-IR). The columnar structure of AIN thin films was observed by FE-SEM. The surface roughness of AlN films on the 3C-SiC buffer layer was measured using AFM. The XRD pattern of AlN films on SiC buffer layers was highly oriented at (002). Full width at half maximum (FWHM) of the rocking curve near (002) reflections was $1.3^{\circ}$. The infrared absorbance spectrum indicated that the residual stress of AIN thin films grown on SiC buffer layers was nearly negligible. The 3C-SiC intermediate layers are promising for the realization of nitride based electronic and mechanical devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1997.11a
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• pp.25-29
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• 1997

Capacitor-type MONOS (metal-oxide-nitride-oxide- semiconductor) NVSMs with 23$\AA$ tunneling oxide and 40$\AA$ blocking oxide were fabricated. The thicknesses of nitride layer were 45$\AA$, 91$\AA$ and 223$\AA$, Breakdown characteristics of MONOS devices were measured to investigate the reliability of superthin ONO structure using ramp voltage and constant voltage method. Reducing the nitride thickness will significantly increase the reliablity of MONOS NVSM.

• 한국신재생에너지학회:학술대회논문집
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• 2010.11a
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• pp.56.1-56.1
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• 2010

결정질 실리콘 태양전지의 표면 ARC(Anti-reflection Coating)layer는 반사도를 줄여 광 흡수율을 증가시키고, passivation 효과를 통하여 표면 재결합을 감소 시켜 태양전지의 효율을 높이는 중요한 역할을 한다. Silicon nitride 박막은 외부 stress 요인에 대해 안정성을 담보할 수 있어야한다. 따라서, 본 연구에서는 굴절률 가변에 따른 silicon nitride 박막을 PECVD를 이용하여 증착하고, 항온/항습 stability test를 통해 박막의 안정성을 확인하였다. Silicon nitride 증착을 위해 PECVD를 이용하였고, 공정압력 0.8Torr, 증착온도 $450^{\circ}C$, 증착파워 300W에서 실험을 진행하였다 박막의 굴절률은 1.9~2.3의 범위로 가변하였다. 항온/항습에 대한 신뢰성을 test 하기 위하여 5시간동안의 test를 1cycle로 하여 20회 동안 실험을 실시하였다. 증착된 silicon nitride 박막의 lifetime은 firing 이후 57.8us로 가장 높았으며, 항온/항습 test 이후에도 유사한 경향을 확인 할 수 있었다. 또한, 100h 동안의 항온/항습 test 결과 silicon nitride 박막의 lifetme 감소는 8.5%에 불과했다. 본 연구를 통하여 온도와 습도의 변화에 따른 결정질 실리콘 태양전지의 SiNx 박막의 증착 공정 조건에 대한 신뢰성을 확인 할 수 있었다.