• Title/Summary/Keyword: nitride

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Wear Properties of Silicon Nitride Nano-Ceramics (나노 질화규소 세라믹스의 내마모 특성)

  • Kim, Jae-Hee;Kumar B, Venkata Manoj;Kim, Won-Sik;Hong, Seong-Hyeon
    • Journal of the Korean Ceramic Society
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    • v.46 no.5
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    • pp.505-509
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    • 2009
  • In this study, bulk nano-crystalline $Si_3N_4$ ceramics were fabricated by spark plasma sintering (SPS) and their mechanical properties, in particular wear, were investigated. A wide range of grain sizes, from 80 nm and 250 nm were obtained by varying sintering conditions ($1550^{\circ}C$-5 min to $1650^{\circ}C$-20 min). The elastic modulus of obtained ceramics was ${\sim}250$ GPa and hardness was in the range of $13{\sim}14$ GPa. The indentation fracture toughness increased from $2.58MPa{\cdot}m^{1/2}$ to $3.24MPa{\cdot}m^{1/2}$ with increasing sintering temperature possibly due to the elongated grains. Sliding wear tests revealed at least an order magnitude improvement in wear resistance with grain refinement. Microstructure analysis indicated that nano-$Si_3N_4$ specimens worn mainly through delamination and microcracking, while that of coarser specimens revealed severe wear with grain debonding and fracture.

Electrical Behavior of Aluminum Nitride Ceramics Sintered with Yttrium Oxide and Titanium Oxide

  • Lee, Jin-Wook;Lee, Won-Jin;Lee, Sung-Min
    • Journal of the Korean Ceramic Society
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    • v.53 no.6
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    • pp.635-640
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    • 2016
  • Electrical behavior of AlN ceramics sintered with $Y_2O_3$ as a sintering aid has been investigated with respect to additional $TiO_2$ dopant. From the impedance spectroscopy, it was found that the grain and grain boundary conductivities have greatly decreased with addition of $TiO_2$ dopant. The $TiO_2$ dopant also increased the activation energy of the grain conductivity by about 0.37 eV; this increase was attributed to the formation of an associate between Al vacancies and Ti ions at the Al sites. Similarly, the electronic conductivity was reduced by $TiO_2$ addition. However, $TiO_2$ solubility in AlN grains was below the detection limit of typical EDX analysis. Grain boundary was clean, without liquid films, but did show yttrium segregation. The transference number of ions was close to 1, showing that AlN is a predominantly ionic conductor. Based on the observed results, the implications of using AlN applications as insulators have been discussed.

Effects of Debinding Atmosphere on Properties of Sintered Reaction-bonded Si3N4 Prepared by Tape Casting Method

  • Park, Ji-Sook;Lee, Sung-Min;Han, Yoon-Soo;Hwang, Hae-Jin;Ryu, Sung-Soo
    • Journal of the Korean Ceramic Society
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    • v.53 no.6
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    • pp.622-627
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    • 2016
  • The effects of the debinding atmosphere on the properties of sintered reaction-bonded $Si_3N_4$ (SRBSN) ceramics prepared by tape casting method were investigated. Si green tape was produced from Si slurry of Si powder, using 11.5 wt% polyvinyl butyral as the organic binder and 35 wt% dioctyl phthalate as the plasticizer. The debinding process was conducted in air and $N_2$ atmospheres at $400^{\circ}C$ for 4 h. The nitridation process of the debinded Si specimens was performed at $1450^{\circ}C$, followed by sintering at $1850^{\circ}C$ and 20 MPa. The results revealed that the debinding atmosphere had a significant effect on $Si_3N_4$ densification and thermal conductivity. Owing to the higher sintered density and larger grain size, the thermal conductivity of $Si_3N_4$ specimens debinded in air was higher than that of the samples debinded in $N_2$. Thus, debinding in air could be suitable for the manufacture of high-performance SRBSN substrates by tape casting.

Design of an High Efficiency Pallet Power Amplifier Module (S-대역 고효율 Pallet 전력증폭기 모듈 설계)

  • Choi, Gil-Wong;Kim, Hyoung-Jong;Choi, Jin-Joo;Choi, Jun-Ho
    • Journal of the Korea Institute of Military Science and Technology
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    • v.13 no.6
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    • pp.1071-1079
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    • 2010
  • This paper describes the design and fabrication of a high-efficiency GaN HEMT(Gallium Nitride High-electron Mobility Transistor) Pallet power amplifier module for S-band phased array radar applications. Pallet amplifier module has a series 2-cascaded power amplifier and the final amplification-stage consists of balanced GaN HEMT transistor. In order to achieve high efficiency characteristic of pallet power amplifier module, all amplifiers are designed to the switching-mode amplifier. We performed with various PRF(Pulse Repetition Frequency) of 1, 10, 100 and 1000Hz at a fixed pulse width of $100{\mu}s$. In the experimental results, the output power, gain, and drain efficiency(${\eta}_{total}$) of the Pallet power amplifier module are 300W, 33dB, and 51% at saturated output power of 2.9GHz, respectively.

A Study on the Application of High-Power GaN SSPA for Miniature Radar (GaN 고출력 증폭기의 초소형 레이다 적용에 관한 연구)

  • Lee, Sang_yeop;Yi, Jaewoong
    • Journal of the Korea Institute of Military Science and Technology
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    • v.19 no.5
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    • pp.574-581
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    • 2016
  • Trend on high-power GaN(Gallium Nitride) SSPA(Solid-State Power Amplifier) and its availability in miniature radar systems are presented. There are numerous studies on high-power GaN devices since they have some characteristics of high-breakdown voltage, high power density, and high-temperature stability. Recent scaled GaN technology makes it possible to apply it in SSPAs for W- and G-band applications, with increasing its maximum frequency. In addition, it leads to downsizing and power-efficiency improvement of SSPAs, which means that GaN SSPAs can be available in miniature radar systems. This study also shows radar performance and comparison in the case of using such SSPAs at three frequency bands of Ku, Ka, and W. Finally, we demonstrate prospects of scaled GaN SSPAs in future miniature radar systems.

Etching-Bonding-Thin film deposition Process for MEMS-IR SENSOR Application (MEMS-IR SENSOR용 식각-접합-박막증착 기반공정)

  • Park, Yun-Kwon;Joo, Byeong-Kwon;Park, Heung-Woo;Park, Jung-Ho;Yom, S.S.;Suh, Sang-Hee;Oh, Myung-Hwan;Kim, Chul-Ju
    • Proceedings of the KIEE Conference
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    • 1998.07g
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    • pp.2501-2503
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    • 1998
  • In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PTO layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PTO layer of c-axial orientation raised thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PTO layer were measured, too.

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The etch characteristics of TiN thin films using in $CH_4$/Ar plasma ($CH_4$/Ar 플라즈마를 이용한 TiN 박막의 식각특성 연구)

  • Woo, Jong-Chang;Um, Doo-Seung;Kim, Gwan-Ha;Kim, Dong-Pyo;Kim, Chang-Il
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.247-248
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    • 2008
  • The etching characteristics of Titanium Nitride (TiN) and etch selectivity of TiN to $SiO_2$ and $HfO_2$ in $CH_4$/Ar plasma were investigated. It was found that TiN etch rate shows a non-monotonic behavior with increasing both Ar fraction in $CH_4$ plasma, RF power, and gas pressure. The maximum TiN etch rate of nm/min was obtained for $CH_4$ (80%)/Ar(20%) gas mixture. The plasmas were characterized using optical emission spectroscopy (OES) analysis measurements. From these data, the suggestions on the TiN etch characteristics were made.

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Fabrication and Properties of MFISFET Using $LiNbO_3$ Ferroelectric Films ($LiNbO_3$ 강유전체를 이용한 MFISFET의 제작 및 특성)

  • Jung, Soon-Won;Koo, Kyung-Wan
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.57 no.2
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    • pp.135-139
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    • 2008
  • MFISFETs with platinum electrode on the $LiNbO_3$/aluminum nitride/Si(100) structures were successfully fabricated and the properties of the FETs have been discussed. $I_D-V_G$ characteristics of MFISFETs for linear region (that is, 0.1 V of the drain voltage) showed hysteresis loop with a counter-clockwise trace due to the ferroelectric nature of $LiNbO_3$ films. A memory window (i.e., threshold voltage shift) of the fabricated device was about 2[V] for a sweep from -4 to +4[V]. The estimated field-effect electron mobility and transconductance on a linear region were 530[$cm^2/V{\cdot}s$] and 0.16[mS/mm], respectively. The drain current of 27[${\mu}A$] on the "on" state was more than 3 orders of magnitude larger than that of 30[nA] on the "off" state at the same "read" gate voltage of l.5[V], which means the memory operation of the MFISFET.

Fabrication of Metal Nanobridge Arrays using Sacrificial Silicon Nanowire

  • Lee, Kook-Nyung;Lee, Kyoung-Gun;Jung, Suk-Won;Lee, Min-Ho;Seong, Woo-Kyeong
    • Journal of Electrical Engineering and Technology
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    • v.7 no.3
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    • pp.396-400
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    • 2012
  • Novel fabrication method of nanobridge array of various materials was proposed using suspended silicon nanowire array as a sacrificial template structure. Nanobridges of various materials can be simply fabricated by direct deposition with thermal evaporation on the top of prefabricated suspended silicon nanobridge arrays, which are used as a sacrificial structure. Since silicon nanowire can be easily removed by selective dry etching, nanobridge arrays of an intended material are finally obtained. In this paper, metal nanobridges of Ti/Au, around 50-200 nm in thickness and width, 5-20 ${\mu}m$ in length were fabricated to prove the advantages of the proposed nanowire or nanobridge fabrication method. The nanobridges of Ti/Au after complete removal of sacrificial silicon nanowire template were well-established and bending of nanobridge caused by the tensile stress was observed after silicon removing. Up to 50 nm and 10 ${\mu}m$ of silicon nanowire in diameter and length respectively was also very useful for nanowire templates.

Implementation and Problem Analysis of Phase Shifted dc-dc Full Bridge Converter with GaN HEMT (Cascode GaN HEMT를 적용한 위상 천이 dc-dc 컨버터의 구현 및 문제점 분석)

  • Joo, Dong-Myoung;Kim, Dong-Sik;Lee, Byoung-Kuk;Kim, Jong-Soo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.20 no.6
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    • pp.558-565
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    • 2015
  • Gallium nitride high-electron mobility transistor (GaN HEMT) is the strongest candidate for replacing Si MOSFET. Comparing the figure of merit (FOM) of GaN with the state-of-the-art super junction Si MOSFET, the FOM is much better because of the wide band gap characteristics and the heterojunction structure. Although GaN HEMT has many benefits for the power conversion system, the performance of the power conversion system with the GaN HEMT is sensitive because of its low threshold voltage ($V_{th}$) and even lower parasitic capacitance. This study examines the characteristics of a phase-shifted full-bridge dc-dc converter with cascode GaN HEMT. The problem of unoptimized dead time is analyzed on the basis of the output capacitance of GaN HEMT. In addition, the printed circuit board (PCB) layout consideration is analyzed to reduce the negative effects of parasitic inductance. A comparison of the experimental results is provided to validate the dead time and PCB layout analysis for a phase-shifted full-bridge dc-dc converter with cascode GaN HEMT.