• 제목/요약/키워드: new memory

검색결과 1,693건 처리시간 0.025초

학습과 기억의 뇌파 (Electroencephalography of Learning and Memory)

  • 전현진;이승환
    • 생물정신의학
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    • 제23권3호
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    • pp.102-107
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    • 2016
  • This review will summarize EEG studies of learning and memory based on frequency bands including theta waves (4-7 Hz), gamma waves (> 30 Hz) and alpha waves (7-12 Hz). Authors searched and reviewed EEG papers especially focusing on learning and memory from PubMed. Theta waves are associated with acquisition of new information from stimuli. Gamma waves are connected with comparing and binding old information in preexisting memory and new information from stimuli. Alpha waves are linked with attention. Eventually it mediates the learning and memory process. Although EEG studies of learning and memory still have controversial issues, the future EEG studies will facilitate clinical benefits by virtue of more developed and encouraging prospects.

SDF 알고리즘을 이용한 연상기억 처리모델 (A new associative memory model using SDF filter)

  • 정재우
    • 한국광학회:학술대회논문집
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    • 한국광학회 1989년도 제4회 파동 및 레이저 학술발표회 4th Conference on Waves and lasers 논문집 - 한국광학회
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    • pp.95-98
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    • 1989
  • A new associative memory model using the SDF filter, one of the multiple filter for pattern recognition, is suggested in this paper. The SDF filter characteristics such as pattern classification lets the memorized patterns have orthogonal characteristics one another, so that enhances the associative memory's retrieval ability to the original pattern. The computer simulation shows that this new model is very useful in case that the imput patterns are seriously distorted and the cross-correlation between the memorized patterns is very high.

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대용량 메모리 데이타 처리를 위한 범용 하드웨어 기반의 원격 메모리 시스템 (Large-Memory Data Processing on a Remote Memory System using Commodity Hardware)

  • 정형수;한혁;염헌영
    • 한국정보과학회논문지:시스템및이론
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    • 제34권9호
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    • pp.445-458
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    • 2007
  • 본 논문에서는 대용량 메모리 데이타 처리를 위한 범용 하드웨어 기반의 원격 메모리 시스템을 제안한다. 느린 디스크와 상대적으로 대단히 빠른 접근 속도를 보장하는 메모리 사이에 존재하게 되는 새로운 메모리 계층을 구현하기 위해, 본 논문에서는 다수의 일반적인 범용 데스크탑 PC들과 원격 직접메모리 접근 (이하 RDMA) 기능이 가능한 고속 네트워크를 최대한 활용하였다. 제안된 새로운 계층의 메모리는 합리적인 응답시간과 용량을 제공함으로서 비교적 적은 양의 성능 부담으로서 대용량의 메모리 상주 데이타베이스를 구동할 수 있게 되었다. 제안된 원격 메모리 시스템은 원격 메모리 페이지들을 관리하게 되는 원격 메모리 시스템과, 원격 메모리 페이지의 교체를 관리하게 되는 원격 메모리 페이저로 구성되어 있다. 범용으로 쓰이는 MySQL과 같은 데이타베이스를 이용한 TPC-C 실험 결과로 볼 때 제안된 원격 메모리 시스템은 일반적인 대용량 메모리 데이타 처리 시스템에서 요구하는 다양한 요구조건을 만족시킬 수 있을 것이라 생각된다.

Memory Information Extension Model Using Adaptive Resonance Theory

  • Kim, Jong-Soo;Kim, Joo-Hoon;Kim, Seong-Joo;Jeon, Hong-Tae
    • 한국지능시스템학회:학술대회논문집
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    • 한국퍼지및지능시스템학회 2003년도 ISIS 2003
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    • pp.652-655
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    • 2003
  • The human being receives a new information from outside and the information shows gradual oblivion with time. But it remains in memory and isn't forgotten for a long time if the information is read several times over. For example, we assume that we memorize a telephone number when we listen and never remind we may forget it soon, but we commit to memory long time by repeating. If the human being received new information with strong stimulus, it could remain in memory without recalling repeatedly. The moments of almost losing one's life in on accident or getting a stroke of luck are rarely forgiven. The human being can keep memory for a long time in spite of the limit of memory for the mechanism mentioned above. In this paper, we will make a model explaining that mechanism using a neural network Adaptive Resonance Theory.

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A Working-set Sensitive Page Replacement Policy for PCM-based Swap Systems

  • Park, Yunjoo;Bahn, Hyokyung
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제17권1호
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    • pp.7-14
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    • 2017
  • Due to the recent advances in Phage-Change Memory (PCM) technologies, a new memory hierarchy of computer systems with PCM is expected to appear. In this paper, we present a new page replacement policy that adopts PCM as a high speed swap device. As PCM has limited write endurance, our goal is to minimize the amount of data written to PCM. To do so, we defer the eviction of dirty pages in proportion to their dirtiness. However, excessive preservation of dirty pages in memory may deteriorate the page fault rate, especially when the memory capacity is not enough to accommodate full working-set pages. Thus, our policy monitors the current working-set size of the system, and controls the deferring level of dirty pages not to degrade the system performances. Simulation experiments show that the proposed policy reduces the write traffic to PCM by 160% without performance degradations.

고속 Viterbi 복호기를 위한 메모리 관리 (Memory management in hihg-speed viterbi decoders)

  • 임민중
    • 전자공학회논문지C
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    • 제35C권7호
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    • pp.30-36
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    • 1998
  • Memory management is one of the most important problems in implementing viterbi decoders. This paper introduces a novel traceback scheme for memory management of high-speed viterbi decoders. The new method balances the read and the write oeprations by inserting dummy write operations into the traceback process, resulting in simpler memory access schemes. It is suitable for VLSI implementation since it uses minimal memory requirements, it does not need global interconnections, and its address genration shceme for accessig memory contents is very simple.

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BER Simulator Development for Link Compliance Analysis

  • Kang, Hyun-Chul;Kim, Woo-Seop;Lee, Jae-Wook;Jang, Young-Chan;Park, Hwan-Wook;Kim, Jong-Hoon;Lee, Jung-Bae;Kim, Chang-Hyun
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제8권2호
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    • pp.150-155
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    • 2008
  • This paper is related to developing new Bit Error Rate (BER) simulator, Sam sung BER simulator (SBERS), in order to evaluate the link compliance and all kinds of effects of link compliance in a real environment. SBERS allows to generate transmit pulse accurately by using the various parameters, and obtain the eye diagram and bathtub curve, which represents the performance of link, by calculating the transmit pulse and the measured frequency response characteristics. SBERS give results as same as real environment after taking account of distribution and value of noise. To verify the accuracy of simulator, we derive the simulated and measured result and compare eye opening. The difference came out to be within 5% error. It is possible to estimate the real environment and design the transmitter and receiver circuit effectively using new BER simulator, SBERS.

A study on new control mechanisms of memory

  • Liu, Haibin;Kakazu, Yukinori
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1992년도 한국자동제어학술회의논문집(국제학술편); KOEX, Seoul; 19-21 Oct. 1992
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    • pp.324-329
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    • 1992
  • A physical phenomenon is observed through analysis of the Hodgkin-Huxley's model that is, according to Maxwell field equations a fired neuron can yield magnetic fields. The magnetic signals are an output of the neuron as some type of information, which may be supposed to be the conscious control information. Therefore, study on neural networks should take the field effect into consideration. Accordingly, a study on the behavior of a unit neuron in the field is made and a new neuron model is proposed. A mathematical Memory-Learning Relation has been derived from these new neuron equations, some concepts of memory and learning are introduced. Two learning theorems are put forward, and the control mechanisms of memory are also discussed. Finally, a theory, i.e. Neural Electromagnetic(NEM) field theory is advanced.

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A New Flash-aware Buffering Scheme Supporting Virtual Page Flushing

  • Lim, Seong-Chae
    • International Journal of Internet, Broadcasting and Communication
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    • 제14권3호
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    • pp.161-170
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    • 2022
  • Recently, NAND-type flash memory has been regarded to be new promising storage media for large-scale database systems. For flash memory to be employed for that purpose, we need to reduce its expensive update cost caused by the inablity of in-place updates. To remedy such a drawback in flash memory, we propose a new flash-aware buffering scheme that enables virtual flushing of dirty pages. To this end, we slightly alter the tradional algorithms used for the logging scheme and buffer management scheme. By using the mechanism of virtual flushing, our proposed buffering scheme can efficiently prevent the frequenct occureces of page updates in flash storage. Besides the advantage of reduced page updates, the proposed viurtual flushing mechanism works favorably for shorneing a recocery time in the presense of failure. This is because it can reduce the time for redo actions during a recovry process. Owing to those two benefits, we can say that our scheme couble be very profitable when it is incorporated into cutting-edge flash-based database systems.

뉴메모리+DRAM 하이브리드 메모리 시스템에서의 고속부팅 기법 연구 (A Study of a Fast Booting Technique for a New memory+DRAM Hybrid Memory System)

  • 송현호;문영제;박재형;노삼혁
    • 정보과학회 논문지
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    • 제42권4호
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    • pp.434-441
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    • 2015
  • 뉴메모리는 차세대 메모리 기술로써 비휘발성과 바이트 단위의 임의 접근성을 가지고 있다. 뉴메모리의 이러한 특성들은 기존의 정형화된 컴퓨터 시스템 구조에 변화를 가져올 것으로 예상된다. 본 연구는 뉴메모리와 DRAM이 공존하는 하이브리드 메인 메모리 구조에서의 고속 부팅 기법을 제안한다. 고속부팅 기법은 본 연구에서 개발한 MMU 변환 테이블을 이용한 쓰기 추적 기술을 이용하였다. 쓰기 추적기술을 이용하여 부팅 이후의 업데이트를 감지할 수 있었고, 부팅 이후의 업데이트를 다른 곳에 저장함으로써 부팅 완료 이미지가 훼손되는 것을 막을 수 있었다. 실제 고속 부팅 시에는 보존된 부팅 완료 이미지를 이용하여 부팅된 상태로 돌아가기 때문에 빠른 부팅이 될 수 있다. 본 연구의 고속 부팅 기법의 성능을 측정하기 위하여 뉴메모리가 장착된 실제 임베디드 실험 보드에서 고속 부팅 시스템을 개발하였으며, 고속 부팅 시간은 0.5초 이내로 빠른 부팅이 가능하였다.