• 제목/요약/키워드: multilevel

검색결과 980건 처리시간 0.027초

Analysis of Cascaded H-Bridge Multilevel Inverter in DTC-SVM Induction Motor Drive for FCEV

  • Gholinezhad, Javad;Noroozian, Reza
    • Journal of Electrical Engineering and Technology
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    • 제8권2호
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    • pp.304-315
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    • 2013
  • In this paper, analysis of cascaded H-bridge multilevel inverter in DTC-SVM (Direct Torque Control-Space Vector Modulation) based induction motor drive for FCEV (Fuel Cell Electric Vehicle) is presented. Cascaded H-bridge multilevel inverter uses multiple series units of H-bridge power cells to achieve medium-voltage operation and low harmonic distortion. In FCEV, a fuel cell stack is used as the major source of electric power moreover the battery and/or ultra-capacitor is used to assist the fuel cell. These sources are suitable for utilizing in cascaded H-bridge multilevel inverter. The drive control strategy is based on DTC-SVM technique. In this scheme, first, stator voltage vector is calculated and then realized by SVM method. Contribution of multilevel inverter to the DTC-SVM scheme is led to achieve high performance motor drive. Simulations are carried out in Matlab-Simulink. Five-level and nine-level inverters are applied in 3hp FCEV induction motor drive for analysis the multilevel inverter. Each H-bridge is implemented using one fuel cell and battery. Good dynamic control and low ripple in the torque and the flux as well as distortion decrease in voltage and current profiles, demonstrate the great performance of multilevel inverter in DTC-SVM induction motor drive for vehicle application.

The effect of missing levels of nesting in multilevel analysis

  • Park, Seho;Chung, Yujin
    • Genomics & Informatics
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    • 제20권3호
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    • pp.34.1-34.11
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    • 2022
  • Multilevel analysis is an appropriate and powerful tool for analyzing hierarchical structure data widely applied from public health to genomic data. In practice, however, we may lose the information on multiple nesting levels in the multilevel analysis since data may fail to capture all levels of hierarchy, or the top or intermediate levels of hierarchy are ignored in the analysis. In this study, we consider a multilevel linear mixed effect model (LMM) with single imputation that can involve all data hierarchy levels in the presence of missing top or intermediate-level clusters. We evaluate and compare the performance of a multilevel LMM with single imputation with other models ignoring the data hierarchy or missing intermediate-level clusters. To this end, we applied a multilevel LMM with single imputation and other models to hierarchically structured cohort data with some intermediate levels missing and to simulated data with various cluster sizes and missing rates of intermediate-level clusters. A thorough simulation study demonstrated that an LMM with single imputation estimates fixed coefficients and variance components of a multilevel model more accurately than other models ignoring data hierarchy or missing clusters in terms of mean squared error and coverage probability. In particular, when models ignoring data hierarchy or missing clusters were applied, the variance components of random effects were overestimated. We observed similar results from the analysis of hierarchically structured cohort data.

An Improved Carrier-based SVPWM Method By the Redistribution of Carrier-wave Using Leg Voltage Redundancies in Generalized Cascaded Multilevel Inverter

  • Kang, Dae-Wook;Lee, Yo-Han;Suh, Bum-Seok;Park, Chang-Ho;Hyun, Dong-Seok
    • Journal of Power Electronics
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    • 제1권1호
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    • pp.36-47
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    • 2001
  • The carrier-based space vector pulse width modulation(SVPWM), which is considered as highly simple and efficient PWM technology, can be also used in multilevel inverters. The method was originally designed for the two-level inverter and developed to the diode clamped multilevel inverter structure. however it may be noted that it also cause bad switch utilization in cascaded multilevel inverter. This paper introduces an improved carrier-based SVPWM scheme, which is fully suitable for cascaded multilevel inverter topologies because it can achieve the optimized switch utilization through the redistribution of the triangular carrier waves considering leg voltage redundancies while having the advantages of the conventional carrier-based SVPWM. Using simulation and experimental results, the superior performance of new PWM method is shown.

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A New Family of Cascaded Transformer Six Switches Sub-Multilevel Inverter with Several Advantages

  • Banaei, M.R.;Salary, E.
    • Journal of Electrical Engineering and Technology
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    • 제8권5호
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    • pp.1078-1085
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    • 2013
  • This paper presents a novel topology for cascaded transformer sub-multilevel converter. Eachsub-multilevel converter consists of two DC voltage sources with six switches to achieve five-level voltage. The proposed topology results in reduction of DC voltage sources and switches number. Single phase low frequency transformers are used in proposed topology and voltage transformation and galvanic isolation between load and sources are given by transformers. This topology can operate as symmetric or asymmetric converter but in this paper we have focused on symmetric state. The operation and performance of the suggested multilevel converter has been verified by the simulation results of a single-phase nine-level multilevel converter using MATLAB/SIMULINK.

Optimal Topologies for Cascaded Sub-Multilevel Converters

  • Babaei, Ebrahim
    • Journal of Power Electronics
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    • 제10권3호
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    • pp.251-261
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    • 2010
  • The general function of a multilevel converter is to synthesize a desired output voltage from several levels of dc voltages as inputs. In order to increase the steps in the output voltage, a new topology is recommended in [1], which benefits from a series connection of sub-multilevel converters. In the procedure described in this reference, despite all the advantages, it is not possible to produce all the steps (odd and even) in the output. In addition, for producing an output voltage with a constant number of steps, there are different configurations with a different number of components. In this paper, the optimal structures for this topology are investigated for various objectives such as minimum number of switches and dc voltage sources and minimum standing voltage on the switches for producing the maximum output voltage steps. Two new algorithms for determining the dc voltage sources magnitudes have been proposed. Finally, in order to verify the theoretical issues, simulation and experimental results for a 49-level converter with a maximum output voltage of 200V are presented.

Advanced Cascade Multilevel Converter with Reduction in Number of Components

  • Ajami, Ali;Oskuee, Mohammad Reza Jannati;Mokhberdoran, Ataollah;Khosroshahi, Mahdi Toupchi
    • Journal of Electrical Engineering and Technology
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    • 제9권1호
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    • pp.127-135
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    • 2014
  • In this paper a novel converter structure based on cascade converter family is presented. The suggested multilevel advanced cascade converter has benefits such as reduction in number of switches and power losses. Comparison depict that proposed topology has the least number of IGBTs among all multilevel cascade type converters which have been introduced recently. This characteristic causes low cost and small installation area for suggested converter. The number of on state switches in current path is less than conventional topologies and so the output voltage drop and power losses are decreased. Symmetric and asymmetric modes are analyzed and compared with conventional multilevel cascade converter. Simulation and experimental results are presented to illustrate validity, good performance and effectiveness of the proposed configuration. The suggested converter can be applied in medium/high voltage and PV applications.

MULTILEVEL 전압형 인버터들을 사용한 D-STATCON의 제어 (Control of The D-STATCON Using Multilevel Voltage Source Inverters)

  • 민완기;민준기;최재호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 F
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    • pp.1925-1927
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    • 1998
  • D-STATCON using the multilevel voltage source inverters is presented for voltage regulation and reactive power compensation in distribution system. This cascade M-level inverter consists of (M-1)/2 single phase full bridge inverter(FBI). This multilevel inverter is a natural fit to the flexible ac transmission systems(FACTS) including STATCON, SVC, series compensation and phase shifting, It can solve the problems of conventional transformer-based multipulse inverters and multilevel diode-clamped inverters. From the simulation results, the superiority of D-STATCON with cascade multilevel inverter is shown for high power application.

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Single Input Multi Output DC/DC Converter: An Approach to Voltage Balancing in Multilevel Inverter

  • Banaei, M.R.;Nayeri, B.;Salary, E.
    • Journal of Electrical Engineering and Technology
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    • 제9권5호
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    • pp.1537-1543
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    • 2014
  • This paper presents a new DC/AC multilevel converter. This configuration uses single DC sources. The proposed converter has two stages. The first stage is a DC/DC converter that can produce several DC-links in the output. The DC/DC converter is one type of boost converter and uses single inductor. The second stage is a multilevel inverter with several capacitor links. In this paper, one single input multi output DC-DC converter is used in order to voltage balancing on multilevel converter. In addition, as compare to traditional multilevel inverter, presented DC/AC multilevel converter has less on-state voltage drop and conduction losses. Finally, in order to verify the theoretical issues, simulation and experimental results are presented.

Performance Analysis of a Novel Reduced Switch Cascaded Multilevel Inverter

  • Nagarajan, R.;Saravanan, M.
    • Journal of Power Electronics
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    • 제14권1호
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    • pp.48-60
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    • 2014
  • Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

Identification of Open-Switch and Short-Switch Failure of Multilevel Inverters through DWT and ANN Approach using LabVIEW

  • Parimalasundar, E.;Vanitha, N. Suthanthira
    • Journal of Electrical Engineering and Technology
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    • 제10권6호
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    • pp.2277-2287
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    • 2015
  • In recent times, multilevel inverters are given high priority in many large industrial drive applications. However, the reliability of multilevel inverters are mainly affected by the failure of power electronic switches. In this paper, open-switch and short-switch failure of multilevel inverters and its identification using a high performance diagnostic system is discussed. Experimental and simulation studies were carried out on five level cascaded H-Bridge multilevel inverter and its output voltage waveforms were analyzed at different switch fault cases and at different modulation index values. Salient frequency domain features of the output voltage signal were extracted using the discrete wavelet transform multi resolution signal decomposition technique. Real time application of the proposed fault diagnostic system was implemented through the LabVIEW software. Artificial neural network was trained offline using the Matlab software and the resultant network parameters were transferred to LabVIEW real time system. In the proposed system, it is possible to precisely identify the individual faulty switch (may be due to open-switch (or) short-switch failure) of multilevel inverters.