• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.921-926
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• 2003

This paper describes a new type of the spatial filter detector (SFD) with variable and multi-valued weighting function. This SFD called variable spatial filter detector with multi-valued weighting function (VSFDwMWF) uses current-mode circuits for noise resistance and high-resolution weighting values. Total weighting values consist of 7bit, 6-signal bit and 1-sign bit. We fabricate VSFDwMWF chip using Rohm 0.35${\mu}$m CMOS process. VSFDwMWF chip includes two-dimensional 10${\times}$13 photodiode array and current-mode weighting control circuit. Simulation shows the weighting values are varied and multi-valued by external switching operation. The layout of VSFDwMWF chip is shown.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.10 no.4
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• pp.287-295
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• 2010

Based on the interval-valued intuitionistic fuzzy hybrid geometric (IIFHG) operator and the interval-valued intuitionistic fuzzy weighted geometric (IIFWG) operator, we investigate the group decision making problems in which all the information provided by the decision-makers is presented as interval-valued in tuitionistic fuzzy decision matrices where each of the elements is characterized by interval-valued intuitionistic fuzzy numbers, and the information about attribute weights is partially known. Anumerical example is used to illustrate the applicability of the proposed approach.

• Journal of IKEEE
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• v.8 no.1 s.14
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• pp.22-32
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• 2004

In this paper, we proposed MOVAG(Multi Output Value Array Graphs) based on OVAG by Honghai Jiang to construct multiple valued logic function The MDD(Muliple-valued Decision Diagra) needs many processing time and efforts in circuit design for given multi-variable function by D.M.Miller, and we designed a MOVAG which has reduce the data processing time and low complexity. We propose the construction algorithm and input matrix selection algorithm and we designed the multiple-valued logic circuit using T-gate and verified by simulation results.

• Journal of Information Processing Systems
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• v.14 no.3
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• pp.790-800
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• 2018

The simplified neutrosophic set (SNS) is a generalization of fuzzy set that is designed for some practical situations in which each element has truth membership function, indeterminacy membership function and falsity membership function. In this paper, we propose a new method to construct similarity measures of single valued neutrosophic sets (SVNSs) and interval valued neutrosophic sets (IVNSs), respectively. Then we prove that the proposed formulas satisfy the axiomatic definition of the similarity measure. At last, we apply them to pattern recognition under the single valued neutrosophic environment and multi-criteria decision-making problems under the interval valued neutrosophic environment. The results show that our methods are effective and reasonable.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.12
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• pp.1878-1888
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• 1990

In this paper, the input-output interconnection method of the multi-valued signal processing circuit using perfect Shuffle technique and Kronecker product is discussed. Using this method, the design method of circuit of the multi-valued Reed-Muller expansions(MRME) to be used the multi-valued signal processing on finite field GF(p**m) is presented. The proposed input-output interconnection method is shown that the matrix transform is efficient and that the module structure is easy. The circuit design of MRME on FG(p**m) is realized following as` 1) contructing the baisc gates on GF(3) by CMOS T gate, 2) designing the basic cells to be implemented the transform and inverse transform matrix of MRME using these basic gates, 3) interconnecting these cells by the input-output interconnecting method of the multivalued signal processing circuits. Also, the circuit design of the multi-valued signal processing function on GF(3\ulcorner similar to Winograd algorithm of 3x3 array of DFT (discrete fourier transform) is realized by interconnection of Perfect Shuffle technique and Kronecker product. The presented multi-valued signal processing circuits that are simple and regular for wire routing and posses the properties of concurrency and modularity are suitable for VLSI.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.2 no.3
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• pp.215-220
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• 2002

This paper proposes a method to apply the Backpropagation(BP) algorithm of MVL(Multi-Valued Logic) Neural Network to pattern recognition. It extracts the property of an object density about an original pattern necessary for pattern processing and makes the property of the object density mapped to MVL. In addition, because it team the pattern by using multiple valued logic, it can reduce time f3r pattern and space fer memory to a minimum. There is, however, a demerit that existed MVL cannot adapt the change of circumstance. Through changing input into MVL function, not direct input of an existed Multiple pattern, and making it each variable loam by neural network after calculating each variable into liter function. Error has been reduced and convergence speed has become fast.

• Journal of the Korean Institute of Intelligent Systems
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• v.6 no.4
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• pp.10-16
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• 1996

In this paper, we construct the state table of the automata according to input, state, and change of state and transform that state table into symbolic multi-valued logic formula. Also, we propose an adaptive automata which adapts dynamically change of state aqording to the input string of automata by using the properties of derivative about the symbolic multi-valued logic function. And we analyze the properties of the adaptive automata.

• Journal of Information Processing Systems
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• v.14 no.5
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• pp.1215-1224
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• 2018

Interval-valued neutrosophic hesitant fuzzy set (IVNHFS) is an extension of neutrosophic set (NS) and hesitant fuzzy set (HFS), each element of which has truth membership hesitant function, indeterminacy membership hesitant function and falsity membership hesitant function and the values of these functions lie in several possible closed intervals in the real unit interval [0,1]. In contrast with NS and HFS, IVNHFS can be more flexibly used to deal with uncertain, incomplete, indeterminate, inconsistent and hesitant information. In this study, I propose the novel correlation coefficient of IVNHFSs and my paper discusses its properties. Then, based on the novel correlation coefficient, I develop an approach to deal with multi-attribute decision-making problems within the framework of IVNHFS. In the end, a practical example is used to show that the approach is reasonable and effective in dealing with decision-making problems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.6
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• pp.580-598
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• 1987

This paper presents a method to realize the sequential multiple-valued Logic on Galois field. First, We develop so that Taylor series can be corresponded the irreducible polynomial to realize over the finite field, and produce the matrix. This paper object expanded a basic concept of the conbinational Logic circuit so as to apply in the sequential Logic circuit. First of all, We suggest a theory for constructing sequential multiple-valued Logic circuit. Then, We realized the construction with the single input and the multi-output that expanded its function construction. In case of the multi-output, the circuit process by the partition function concept as the mutual independent. This method can be reduced a enormous computer course to need a traditional extention that designed the sequential multi-valued Logic circuit.

• The Transactions of the Korea Information Processing Society
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• v.4 no.7
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• pp.1851-1864
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• 1997

This paper presents an algorithm simplifying the ESOP function by several rules. The algorithm is repeatedly performing operations based on the state of each terms by the product transformation operation of two functions and thus it is simplifying the ESOP function through the reduction of the product terms. Through the minimization of the product terms of the multi-valued input binary multi-output function, an optimization of the input has been done using EXOR PLA with input decoder. The algorithm when applied to four valued arithmetic circuit has been used for a EXOR logic circuit design and the two bits input decoder has been used for a EXOR-PLA design. It has been found from a computer simulation(IBM PC486) that the suggested algorithm can reduce the product terms of the output function remarkably regardless of the number of input variables when the variable AND-EXOR PLA is applied to the poperation circuit.