• Title/Summary/Keyword: modular polynomial

Search Result 45, Processing Time 0.025 seconds

MODULAR POLYNOMIALS FOR MODULAR CURVES X0+(N)

  • Choi, SoYoung
    • Journal of the Chungcheong Mathematical Society
    • /
    • v.24 no.3
    • /
    • pp.529-531
    • /
    • 2011
  • We show that for all $N{\geq}1$, the modular function field $K(X_0^+(N))$ is generated by j(z)j(Nz) and j(z) + j(Nz) over ${\mathbb{C}}$, where j(z) is the modular invariant. Moreover we derive the defining equation of the the modular function field $K(X_0^+(N))$ from the classical modular polynomial ${\Phi}_N(X, Y )$.

Design of an LFSR Multiplier with Low Area Complexity (효율적인 공간 복잡도의 LFSR 곱셈기 설계)

  • 정재형;이성운;김현성
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.8 no.3
    • /
    • pp.85-90
    • /
    • 2003
  • This paper proposes a modular multiplier based on LFSR (Linear Feedback Shift Register) architecture with efficient area complexity over GF(2/sup m/). At first, we examine the modular exponentiation algorithm and propose it's architecture, which is basic module for public-key cryptosystems. Furthermore, this paper proposes on efficient modular multiplier as a basic architecture for the modular exponentiation. The multiplier uses AOP (All One Polynomial) as an irreducible polynomial, which has the properties of all coefficients with '1 ' and has a more efficient hardware complexity compared to existing architectures.

  • PDF

Design of LFSR Multipliers for Public-key Cryptosystem (공개키 암호 시스템을 위한 LFSR 곱셈기 설계)

  • 이진호;김현성
    • Journal of Korea Society of Industrial Information Systems
    • /
    • v.9 no.1
    • /
    • pp.43-48
    • /
    • 2004
  • This paper presents new architectures based on the linear feedback shia resister architecture over GF(2m). First we design a modular multiplier and a modular squarer, then propose an architecture by combing the multiplier and the squarer. All architectures use an irreducible AOP (All One Polynomial) as a modulus, which has the properties of all coefficients with '1'. The proposed architectures have lower hardware complexity than previous architectures. They could be. Therefore it is useful for implementing the exponentiation architecture, which is the con operation in public-key cryptosystems.

  • PDF

Design of Parallel Multiplier Circuit synthesized operation module over $GF(2^m)$ (연산 모듈의 결합에 의한 $GF(2^m)$상의 병렬 승산 회로의 설계)

  • Byun, Gi-Young;Kim, Heung-Soo
    • Proceedings of the KIEE Conference
    • /
    • 2002.11c
    • /
    • pp.268-273
    • /
    • 2002
  • In this paper, a new parallel multiplier circuit over $GF(2^m)$ has been proposed. The new multiplier is composed of polynomial multiplicative operation part and modular arithmetic operation part, irreducible polynomial operation part. And each operation has modular circuit block. For design the new proposed circuit, it develop generalized equations using frame each operation idea and show a example for $GF(2^m)$.

  • PDF

Two dimensional Fast DCT using Polynomial Transform without Complex Computations (복소연산이 없는 Polynomial 변환을 이용한 2차원 고속 DCT)

  • Park, Hwan-Serk;Kim, Won-Ha
    • Journal of the Institute of Electronics Engineers of Korea CI
    • /
    • v.40 no.6
    • /
    • pp.127-140
    • /
    • 2003
  • This paper develops a novel algorithm of computing 2 Dimensional Discrete Cosine Transform (2D-DCT) via Polynomial Transform (PT) converting 2D-DCT to the sum of 1D-DCTs. In computing N${\times}$M size 2D-DCT, the conventional row-column algorithm needs 3/2NMlog$_2$(NM)-2NM+N+M additions and 1/2NMlog$_2$(NM) additions and 1/2NMlog$_2$(NM) multiplications, while the proposed algorithm needs 3/2NMlog$_2$M+NMlog$_2$N-M-N/2+2 additions and 1/2NMlog$_2$M multiplications The previous polynomial transform needs complex operations because it applies the Euler equation to DCT. Since the suggested algorithm exploits the modular regularity embedded in DCT and directly decomposes 2D DCT into the sum of ID DCTs, the suggested algorithm does not require any complex operations.

Design of Efficient NTT-based Polynomial Multiplier (NTT 기반의 효율적인 다항식 곱셈기 설계)

  • Lee, SeungHo;Lee, DongChan;Kim, Yongmin
    • Journal of IKEEE
    • /
    • v.25 no.1
    • /
    • pp.88-94
    • /
    • 2021
  • Public-key cryptographic algorithms such as RSA and ECC, which are currently in use, have used mathematical problems that would take a long time to calculate with current computers for encryption. But those algorithms can be easily broken by the Shor algorithm using the quantum computer. Lattice-based cryptography is proposed as new public-key encryption for the post-quantum era. This cryptographic algorithm is performed in the Polynomial Ring, and polynomial multiplication requires the most processing time. Therefore, a hardware model module is needed to calculate polynomial multiplication faster. Number Theoretic Transform, which called NTT, is the FFT performed in the finite field. The logic verification was performed using HDL, and the proposed design at the transistor level using Hspice was compared and analyzed to see how much improvement in delay time and power consumption was achieved. In the proposed design, the average delay was improved by 30% and the power consumption was reduced by more than 8%.

Modular Cell을 이용한 RS 디코더의 집적회로 설계

  • 임충빈;이광엽;이문기;김용석;홍현석;송동일;김영웅
    • Proceedings of the Korean Institute of Communication Sciences Conference
    • /
    • 1986.10a
    • /
    • pp.92-102
    • /
    • 1986
  • In this paper, Modular cell approach was applied to custom IC design or RS decoder. For the design of RS decoder by modular cells, 3 basic cells and one extra circuit are designed, these are, SYN cell for syndrome calculation, AL cell for error locator polynomial calculation, and REM cell for remaining error transform calculation. RS decoder design by these basic cells is very simple and regular, and naturally suitable for VLSI RS decoder design.

  • PDF

MODULAR INVARIANTS UNDER THE ACTIONS OF SOME REFLECTION GROUPS RELATED TO WEYL GROUPS

  • Ishiguro, Kenshi;Koba, Takahiro;Miyauchi, Toshiyuki;Takigawa, Erika
    • Bulletin of the Korean Mathematical Society
    • /
    • v.57 no.1
    • /
    • pp.207-218
    • /
    • 2020
  • Some modular representations of reflection groups related to Weyl groups are considered. The rational cohomology of the classifying space of a compact connected Lie group G with a maximal torus T is expressed as the ring of invariants, H*(BG; ℚ) ≅ H*(BT; ℚ)W(G), which is a polynomial ring. If such Lie groups are locally isomorphic, the rational representations of their Weyl groups are equivalent. However, the integral representations need not be equivalent. Under the mod p reductions, we consider the structure of the rings, particularly for the Weyl group of symplectic groups Sp(n) and for the alternating groups An as the subgroup of W(SU(n)). We will ask if such rings of invariants are polynomial rings, and if each of them can be realized as the mod p cohomology of a space. For n = 3, 4, the rings under a conjugate of W(Sp(n)) are shown to be polynomial, and for n = 6, 8, they are non-polynomial. The structures of H*(BTn-1; 𝔽p)An will be also discussed for n = 3, 4.