• IEMEK Journal of Embedded Systems and Applications
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• v.4 no.4
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• pp.195-200
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• 2009

As 4G mobile communication systems require high transmission rates with reliability, the need for efficient error correcting code is increasing. In this paper, a novel LDPC (Low Density Parity Check) decoder is introduced. The LDPC code is one of the most popular error correcting codes. In order to improve performance of the LDPC decoder, we use SNR (Signal-to-Noise Ratio) estimation results to adjust coefficients of modified UMP-BP (Uniformly Most Probable Belief Propagation) algorithm which is one of widely-used LDPC decoding algorithms. An advantage of Modified UMP-BP is that it is amenable to implement in hardware. We generate the optimal values by simulation for various SNRs and coefficients, and the values are stored in a look-up table. The proposed decoder decides coefficients of the modified UMP-BP based on SNR information. The simulation results show that the BER (Bit Error Rate) performance of the proposed LDPC decoder is better than an LDPC decoder using a conventional modified UMP-BP.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.3C
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• pp.287-294
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• 2010

MB-OFDM UWB system will adopt LDPC codes to enhance the decoding performance with higher data rates. In this paper, we will consider algorithm and architecture of the LDPC codes in MB-OFDM UWB system. To suggest the hardware efficient LDPC decoder architecture, LLR(log-likelihood-ration) calculation algorithms and check node update algorithms are analyzed. And we proposed the architecture of LDPC decoder for the high throughput application of Wimedia UWB. We estimated the feasibility of the proposed architecture by implementation in a FPGA. The implementation results show our architecture attains higher throughput than other result of QC-LDPC case. Using this architecture, we can implement LDPC decoder for high throughput transmission, but it is 0.2dB inferior to the BP algorithm.

• Journal of the Korean Data and Information Science Society
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• v.8 no.2
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• pp.163-171
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• 1997

Function approximation from a set of input-output pairs has numerous applications in scientific and engineering areas. Multilayer feedforward neural networks have been proposed as a good approximator of nonlinear function. The back propagation(BP) algorithm allows multilayer feedforward neural networks to learn input-output mappings from training samples. It iteratively adjusts the network parameters(weights) to minimize the sum of squared approximation errors using a gradient descent technique. However, the mapping acquired through the BP algorithm may be corrupt when errorneous training data we employed. When errorneous traning data are employed, the learned mapping can oscillate badly between data points. In this paper we propose a robust BP learning algorithm that is resistant to the errorneous data and is capable of rejecting gross errors during the approximation process, that is stable under small noise perturbation and robust against gross errors.

• Journal of the Korea Computer Graphics Society
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• v.17 no.3
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• pp.9-19
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• 2011

Computing triangle-triangle intersections has been a fundamental task required for many 3D geometric problems. We propose a novel robust GPU algorithm to efficiently compute intersections in a large triangle set. The algorithm has three stages:k-d tree construction, triangle pair generation, and exact intersection computation. All three stages are executed on GPU except, for unsafe triangle pairs. Unsafe triangle pairs are robustly handled by CLP(controlled linear perturbation) on a CPU thread. They are identified by floating-point filtering while exact intersection is computed on GPU. Many triangles crossing a split plane are duplicated in k-d tree construction, which form a lot of redundant triangle pairs later. To eliminate them efficiently, we use a split index which can determine redundancy of a pair by a simple bitwise operation. We applied the proposed algorithm to computing 3D Minkowski sum boundaries to verify its efficiency and robustness.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.1
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• pp.163-170
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• 2022

This paper introduces a method of extracting facial features due to unrefined inputs in real life and improving the problem of not guaranteeing the ideal performance and speed of the object recognition model through a storage algorithm through weight summation. Many facial recognition processes ensure accuracy in ideal situations, but the problem of not being able to cope with numerous biases that can occur in real life is drawing attention, which may soon lead to serious problems in the face recognition process closely related to security. This paper presents a method of quickly and accurately recognizing faces in real time by comparing feature points extracted as input with a small number of feature points that are not overfit to multiple biases, using that various variables such as picture composition eventually take an average form.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.4
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• pp.939-947
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• 2010

The LDPC(Low-Density Parity-Check) code, which is one of the channel encoding methods in IEEE 802.11n wireless LAN standard, has superior error-correcting capabilities. Since the hardware complexity of LDPC decoder is high, it is very important to take into account the trade-offs between hardware complexity and decoding performance. In this paper, the effects of LLR(Log-Likelihood Ratio) approximation on the performance of MSA(Min-Sum Algorithm)-based LDPC decoder are analyzed, and some optimal design conditions are derived. The parity check matrix with block length of 1,944 bits and code rate of 1/2 in IEEE 802.11n WLAN standard is used. In the case of $BER=10^{-3}$, the $E_b/N_o$ difference between LLR bit-widths (6,4) and (7,5) is 0.62 dB, and $E_b/N_o$ difference for iteration cycles 6 and 7 is 0.3 dB. The simulation results show that optimal BER performance can be achieved by LLR bit-width of (7,5) and iteration cycle of 7.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.1
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• pp.143-152
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• 2013

Given weighted graph G=(V,E), n=|V|, m=|E|, the minimum cut problem is classified with source s and sink t or without s and t. Given undirected weighted graph without s and t, Stoer-Wagner algorithm is most popular. This algorithm fixes arbitrary vertex, and arranges maximum adjacency (MA)-ordering. In the last, the sum of weights of the incident edges for last ordered vertex is computed by cut value, and the last 2 vertices are merged. Therefore, this algorithm runs $\frac{n(n-1)}{2}$ times. Given graph with s and t, Ford-Fulkerson algorithm determines the bottleneck edges in the arbitrary augmenting path from s to t. If the augmenting path is no more exist, we determine the minimum cut value by combine the all of the bottleneck edges. This paper suggests minimum cut algorithm for undirected weighted graph with s and t. This algorithm suggests MA-merging and computes cut value simultaneously. This algorithm runs n-1 times and successfully divides V into disjoint S and V sets on the basis of minimum cut, but the Stoer-Wagner is fails sometimes. The proposed algorithm runs more than Ford-Fulkerson algorithm, but finds the minimum cut value within n-1 processing times.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.20 no.6
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• pp.402-409
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• 2019

Patients with dementia or elderly patients who can not move at all by themselves are at a high risk of falls and bedsore due to lack of caregivers. In this paper, to solve this problem, we propose an algorithm to determine the patient's lying postures by discriminating the main body parts such as head, shoulders, and hips based on the pressure intensity sensed at regular intervals. A smart mat with a lattice structure in which a pressure sensor is arranged so that the body part can be discriminated irrespective of the physical characteristics has been implemented. It consists of two modules of $7{\times}7$ array size. Each module consists of 49 FSR-406 sensors and independently senses pressure. For each module, the body part corresponding to the upper body or the lower body is sequentially discriminated by using a pressure distribution such as a cumulative pressure sum using a filter. The proposed algorithm can identify five lying positions by examining the inclusion relationship between body parts belonging to layer-1 such as head, shoulder, and hip area.

• IE interfaces
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• v.24 no.4
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• pp.281-294
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• 2011

This paper considers the rail crane scheduling problem which is defined as determining the sequence of loading/unloading container on/from a freight train. The objective is to minimize the weighted sum of the range of order completion time and makespan. The range of order completion time implies the difference between the maximum of completion time and minimum of start time of each customer order consisting of jobs. Makespan refers to the time when all the jobs are completed. In a rail freight terminal, logistics firms as a customer wish to reduce the range of their order completion time. To develop a methodology for the crane scheduling, we formulate the problem as a mixed integer program and develop three metaheuristics, namely, genetic algorithm, simulated annealing, and tabu search. To validate the effectiveness of heuristic algorithms, computational experiments are done based on a set of real life data. Results of the experiments show that heuristic algorithms give good solutions for small-size and large-size problems in terms of solution quality and computation time.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.10a
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• pp.80-83
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• 2010

This paper describes an analysis of decoding performance of multi-mode LDPC(Low Density Parity Check) decoder which supports three block lengths (648, 1296, 1944) and four code rates (1/2, 2/3,3/4, 5/6) for IEEE 802.11n WLAN system. A fixed-point model of LDPC decoder which adopts min-sum algorithm and layered decoding scheme is implemented using Matlab. From fixed-point simulation results for various bit-width parameters such as internal bit-width, bit-width of integer and fractional parts, an optimal design condition and decoding performance of LDPC decoder are analyzed.