• Proceedings of the Materials Research Society of Korea Conference
• /
• 2012.05a
• /
• pp.64.1-64.1
• /
• 2012

Next generation displays such as high performance LCD, AMOLED, flexible display and transparent display require specific TFT back-planes. For high performance TFT back-planes, low temperature poly silicon (LTPS), and metal-oxide semiconductors are studied. Flexible TFT backplanes require low temperature processible organic semiconductors. Not only development of active semiconducting materials but also design and synthesis of semiconductor corresponding gate dielectric materials are important issues in those display back-planes. In this study, we investigate the high heat resistant polymeric gate dielectric materials for organic TFT and inorganic TFT with good insulating properties and processing chemical resistance. We also controlled and optimized surface energy and morphology of gate dielectric layers for direct printing process with solution processible organic and inorganic semiconductors.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.17 no.2
• /
• pp.212-216
• /
• 2004

In this paper, we have fabricated a triode field emitter using carbon nanotubes (CNTs) directly grown by thermal chemical vapor deposition(CVD) method as an electron omission source. Vertically aligned CNTs have been grown in the center of the gate hole, to the size of 1.5 ${\mu}{\textrm}{m}$ in diameter, with help of a sacrificial layer of a type generally used in metal tip process. By the method of tilling the substrate, we made CNTs emitters both with and without SiO$_2$layer, a sidewall protector, deposited on sidewall of gate. After that we researched the electrical characteristics about two types of emitters. In effect, a sidewall protector can enhance the electrical characteristics by suppressing the problem of short circuits between the gate and the CNTs. The leakage current of an emitter with a sidewall protector is approximately sevenfold lower than that of an emitter without it at a gate voltage of 100 V.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.187-187
• /
• 2012

Solution-processed metal-alloy oxides such as indium zinc oxide (IZO), indium gallium zinc oxide (IGZO) has been extensively researched due to their high electron mobility, environmental stability, optical transparency, and solution-processibility. In spite of their excellent material properties, however, there remains a challenging problem for utilizing IZO or IGZO in electronic devices: the supply shortage of indium (In). The cost of indium is high, what is more, indium is becoming more expensive and scarce and thus strategically important. Therefore, developing an alternative route to improve carrier mobility of solution-processable ZnO is critical and essential. Here, we introduce a simple route to achieve high-performance and low-temperature solution-processed ZnO thin film transistors (TFTs) by employing alkali-metal doping such as Li, Na, K or Rb. Li-doped ZnO TFTs exhibited excellent device performance with a field-effect mobility of $7.3cm^2{\cdot}V-1{\cdot}s-1$ and an on/off current ratio of more than 107. Also, in case of higher drain voltage operation (VD=60V), the field effect mobility increased up to $11.45cm^2{\cdot}V-1{\cdot}s-1$. These all alkali metal doped ZnO TFTs were fabricated at maximum process temperature as low as $300^{\circ}C$. Moreover, low-voltage operating ZnO TFTs was fabricated with the ion gel gate dielectrics. The ultra high capacitance of the ion gel gate dielectrics allowed high on-current operation at low voltage. These devices also showed excellent operational stability.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.20 no.10
• /
• pp.1927-1934
• /
• 2016

In this paper, we proposed a I-gate n-MOSFET (n-type Metal Oxide Semiconductors Field Effect Transistor) structure in order to mitigate a radiation-induced leakage current path in an isolation oxide interface of a silicon-based standard n-MOSFET. The proposed I-gate n-MOSFET structure was designed by using a layout modification technology in the standard 0.18um CMOS (Complementary Metal Oxide Semiconductor) process, this structure supplements the structural drawbacks of conventional radiation-tolerant electronic device using layout modification technology such as an ELT (Enclosed Layout Transistor) and a DGA (Dummy Gate-Assisted) n-MOSFET. Thus, in comparison with the conventional structures, it can ensure expandability of a circuit design in a semiconductor-chip fabrication. Also for verification of a radiation-tolerant characteristic, we carried out M&S (Modeling and Simulation) using TCAD 3D (Technology Computer Aided Design 3-dimension) tool. As a results, we had confirmed the radiation-tolerant characteristic of the I-gate n-MOSFET structure.

• Journal of Sensor Science and Technology
• /
• v.23 no.4
• /
• pp.284-289
• /
• 2014

In this paper, modeling of a gate/body-tied (GBT) PMOSFET photodetector with built-in transfer gate is performed. It can control the photocurrent with a high-sensitivity. The GBT photodetector is a hybrid device consisted of a MOSFET, a lateral BJT, and a vertical BJT. This device allows for amplifying the photocurrent gain by $10^3$ due to the GBT structure. However, the operating parameters of this photodetector, including its photocurrent and transfer characteristics, were not known because modeling has not yet been performed. The sophisticated model of GBT photodetector using a process simulator is not compatible with circuit simulator. For this reason, we have performed SPICE modeling of the photodetector with reduced complexity using Cadence's Spectre program. The proposed modeling has been demonstrated by measuring fabricated chip by using 0.35 im 2-poly 4-metal standard CMOS technology.

• Proceedings of the Korean Society for Technology of Plasticity Conference
• /
• 2009.05a
• /
• pp.298-301
• /
• 2009

In this study, the casting process using forged insert was investigated to characterize the manufacturing process by which good mechanical properties can be obtained when compared with existing casting products. Process analysis for the casting design was performed by using FVM (Finite Volume Method) software. In filling process, three kinds of candidate gating systems are considered and analyzed respectively. The molten metal behavior in gating system is so important that it affects the solidification behavior of the cast.

• Transactions on Electrical and Electronic Materials
• /
• v.9 no.1
• /
• pp.6-11
• /
• 2008

In this study, we investigated effects of hydrogen annealing (HA) and plasma nitridation (PN) applied in order to improve $Si/SiO_2$ interface characteristics of TiN metal gate. In result, HA and PN showed a positive effect decreasing number of interface state $(N_{it})$ respectively. After FN stress for verifying reliability, however, we identified rapid increase of $N_{it}$ for TiN gate with HA, which is attributed to hydrogen related to a change of $Si/SiO_2$ interface characteristic. In contrast to HA, PN showed an improved Nit and gate oxide leakage characteristic due to several possible effects, such as blocking of Chlorine (Cl) diffusion and prevention of thermal reaction between TiN and $SiO_2$.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.14 no.1
• /
• pp.87-96
• /
• 2019

Flexible organic light-emitting diode (OLED) displays with organic thin-film transistors (OTFTs) backplanes have been studied. A gate driver is required to drive the OLED display. The gate driver is integrated into the panel to reduce the manufacturing cost of the display panel and to simplify the module structure using fabrication methods based on low-temperature, low-cost, and large-area printing processes. In this paper, pseudo complementary metal oxide semiconductor (CMOS) logic gates are implemented using OTFTs for the gate driver integrated in the flexible OLED display. The pseudo CMOS inverter and NAND gates are designed and fabricated on a flexible plastic substrate using inkjet-printed OTFTs and the same process as the display. Moreover, the operation of the logic gates is confirmed by measurement. The measurement results show that the pseudo CMOS inverter can operate at input signal frequencies up to 1 kHz, indicating the possibility of the gate driver being integrated in the flexible OLED display.

• Design & Manufacturing
• /
• v.2 no.1
• /
• pp.11-14
• /
• 2008

we can save a development cost and time as computer was used in tool and die design of car fields in die manufacture process. Dimension accuracy errors such as springback, springgo, overcrown and twist were reduced product accuracy and caused trouble to assembly each parts of car. In this paper, CADCEUS was used to modify and optimize results of deflection for a tail gate panel of car parts in order to reduce dimension accuracy errors by springback in sheet metal forming. As CADCEUS was used to apply for a tail gate panel, the time for quality to improve was reduced to 30%.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.55 no.1
• /
• pp.26-29
• /
• 2006

Transparent ZnO thin films were prepared by KrF pulsed laser deposition (PLD) technique and applied to a bottom-gate type thin film transistor device as an active channel layer. A high conductive crystalline Si substrate was used as an metal-like bottom gate and SiN insulating layer was then deposited by LPCVD(low pressure chemical vapour deposition). An aluminum layer was then vacuum evaporated and patterned to form a source/drain metal contact. Oxygen partial pressure and substrate temperature were varied during the ZnO PLD deposition process and their influence on the thin film properties were investigated by X-ray diffraction(XRD) and Hall-van der Pauw method. Optical transparency of the ZnO thin film was analyzed by UV-visible phometer. The resulting ZnO-TFT devices showed an on-off ration of $10^6$ and field effect mobility of 2.4-6.1 $cm^2/V{\cdot}s$.