• Korean Journal of Materials Research
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• v.28 no.4
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• pp.195-200
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• 2018

This study investigated the effects of the post annealing temperatures on the electrical and interfacial properties of a metal-semiconductor-metal photodetector(MSM-PD) device. The interdigitate type MSM-PD devices had the structure Al(500 nm) / Ti(200 nm) / poly-Si(500 nm). Structural analyses of the MSM-PD devices were performed by employing X-ray diffraction(XRD), scanning electron microscopy(SEM) and transmission electron microscope(TEM). Electrical characteristics of the MSM-PD were also examined using current-voltage(I-V) measurements. The optimal post annealing condition for the Schottky contact of MSM-PD devices are $350^{\circ}C$-30minutes. However, as the annealing temperature and time are increased, electrical characteristics of MSM-PD device are degraded. Especially, for the annealing conditions of $400^{\circ}C$-180minutes and $500^{\circ}C$-30minutes, the I-V measurement itself was impossible. These results are closely related to the solid phase reactions at the interface of MSM-PD device, which result in the formation of intermetallic compounds such as $Al_3Ti$ and $Ti_7Al_5Si_{12}$.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.164-164
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• 2013

Among multicomponent nanostructures, hybrid nanocatalysts consisting of metal nanoparticle-semiconductor junctions offer an interesting platform to study the role of metal-oxide interfaces and hot electron flows in heterogeneous catalysis. In this study, we report that hot carriers generated upon photon absorption significantly impact the catalytic activity of CO oxidation. We found that Pt-CdSe-Pt nanodumbbells exhibited a higher turnover frequency by a factor of two during irradiation by light with energy higher than the bandgap of CdSe, while the turnover rate on bare Pt nanoparticles didn't depend on light irradiation. We also found that Pt nanoparticles deposited on a GaN substrate under light irradiation exhibit changes in catalytic activity of CO oxidation that depends on the type of doping of the GaN. We suppose that hot electrons are generated upon the absorption of photons by the semiconducting nanorods or substrates, whereafter the hot electrons are injected into the Pt nanoparticles, resulting in the change in catalytic activity. We discuss the possible mechanism for how hot carrier flows generated during light irradiation affect the catalytic activity of CO oxidation.

• ETRI Journal
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• v.24 no.6
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• pp.455-461
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• 2002

This paper reports on estimating the Schottky barrier height of small contacts using a thermionic-field emission model. Our results indicate that the logarithmic plot of the current as a function of bias voltage across the Schottky diode gives a linear relationship, while the plot as a function of the total applied voltage across a metal-silicon contact gives a parabolic relationship. The Schottky barrier height is extracted from the slope of the linear line resulting from the logarithmic plot of current versus bias voltage across the Schottky diode. The result reveals that the barrier height decreases from 0.6 eV to 0.49 eV when the thickness of the barrier metal is increased from 500 ${\AA}$ to 900 ${\AA}$. The extracted impurity concentration at the contact interface changes slightly with different Ti thicknesses with its maximum value at about $2.9{\times}10^{20}\;cm^{-3}$, which agrees well with the results from secondary ion mass spectroscopy (SIMS) measurements.

• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.64-67
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• 2000

Tungsten silicide(WSi$_2$) is proposed for the alternate gate electrode of ULSI MOS devices. Good structural property and low resistivity of WSi$_2$ deposited by a low pressure chemical vapor deposition(LPCVD) method directly on SiO$_2$ is obtained after annealing. Especially, WSi$_2$-SiO2 interface remains flat after annealing tungsten silicide at high temperature. Electrical characteristics of annealed WSi$_2$-SiO$_2$-Si(MOS) capacitors were improved in view of charge trapping.

• Journal of the Optical Society of Korea
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• v.20 no.1
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• pp.188-191
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• 2016

We investigated surface-roughness-dependent optical loss in a plasmonic cavity consisting of a semiconductor nanodisk/silver nanopan structure. Numerical simulations show that the quality factors of plasmonic resonant modes significantly depend on the surface roughness of the dielectric-metal interface in the cavity structure. In the transverse-magnetic-like whispering-gallery plasmonic mode excited in a structure with disk diameter of 1000 nm, the total quality factor decreased from 260 to 130 with increasing root-mean-square (rms) surface roughness from 0 to 5 nm. This quantitative theoretical study shows that the smooth metal surface plays a critical role in high-performance plasmonic devices.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.4
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• pp.31-34
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• 2002

For the mold die sticking mechanism, the major explanation is that the silica as a filler in EMC (epoxy molding compound) wears die surface to be roughened, which results in increase of adhesion strength. As the sticking behavior, however, showed strong dependency on the EMC models based on the experimental results from different semiconductor manufacturers, chemisorption or acid-base interaction is apt to be also functioning as major mechanisms. In this investigation, the plasma source ion implantation (PSII) using $O_2, N_2$, and $CF_4$ modifies sample surface to form a new dense layer and improve surface hardness, and change metal surface condition from hydrophilic to hydrophobic or vice versa. Through surface energy quantification by measuring contact angle and surface ion coupling state analysis by Auger, major governing mechanism for sticking issue was figured out to be a complex of mechanical and chemical factors.

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.155-155
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• 2000

Adsorption of alkali metals on a silicon surface has attracted much attention due to its importance in metal-semiconductor interface technology, In particular, the bonding nature of alkali metal to silicon substrate has been a focus of fundamental research efforts. We examined the adsorbed layer of Cs on a Si(111)-(7$\times$) surface by reactive ion scattering (RIS) of hyperthermal Cs+ beams. RIS from a Cs-adsorbed surface gives rise to Cs, representing pickup of surface Cs by Cs projectile. The Cs intensity is proportional to surface coverage of Cs at a high substrate temperature (473 K), while it varies anomalously with Cs coverage at low temperatures (130-170 K). This observation indicates that RIS selectively detects metallic Cs on surface, but discriminates ionic Cs. Transition from ionic to metallic Cs adlayer is driven by thermal diffusion of Cs and their clustering process.

• Journal of the Korean Vacuum Society
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• v.10 no.1
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• pp.44-50
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• 2001

Metal oxide semiconductor (MOS) structures containing nanocrystals are fabricated by using rapid thermal oxidations of amorphous silicon films. The amorphous films are deposited either by electron beam deposition method or by electron beam deposition assisted by Ar ion beam during deposition. Post oxidation of e-beam deposited film results in relatively small hysteresis of capacitance-voltage (C-V) and the flat band voltage shift, $\DeltaV_{FB}$ is less than 1V indicative of the formation of low density nanocrystals in $SiO_2$ near $SiO_2$/Si interface. By contrast, we observe very large hysteresis in C-V characteristics for oxidized ion-beam assisted e-beam deposited sample. The flat band voltage shift is larger than 22V and the hysteresis becomes even broader as increasing injection times of holes at accumulation condition and electrons at inversion condition. The result indicates the formation of slow traps in $SiO_2$ near $SiO_2$/Si interface which might be related to large density nanocrystals. Roughly estimated trap density is $1{\times}10^{13}cm^{-2}$. Such a large hysteresis may be explained in terms of the activation of adatom migration by Ar ion during deposition. The activated migration may increase nucleation rate of Si nuclei in amorphous Si matrix. During post oxidation process, nuclei grow into nanocrystals. Therefore, ion beam assistance during deposition may be very feasible for MOS structure containing nanocrystals with large density which is a basic building block for single electron memory device.

• Proceedings of the Korean Magnestics Society Conference
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• 2003.06a
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• pp.24-24
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• 2003

Metallic magnetoelectronic devices have studied intensively and extensively for last decade because of the scientific interest as well as great technological importance. Recently, the scientific activity in spintronics field is extending to the hybrid devices using ferromagnetic/semiconductor heterostructures and to new ferromagnetic semiconductor materials for future devices. In case of the hybrid device, conductivity mismatch problem for metal/semiconductor interface will be able to circumvent when the device operates in ballistic regime. In this respect, spin-valve transistor, first reported by Monsma, is based on spin dependent transport of hot electrons rather than electron near the Fermi energy. Although the spin-valve transistor showed large magnetocurrent ratio more than 300%, but low transfer ratio of the order of 10$\^$-5/ prevents the potential applications. In order to enhance the collector current, we have prepared magnetic tunneling transistor (MTT) with single ferromagnetic base on Si(100) collector by magnetron sputtering process. We have changed the resistance of tunneling emitter and the thickness of baser layer in the MTT structure to increase collector current. The high transfer ratio of 10$\^$-4/ range at bias voltage of more than 1.8 V, collector current of near l ${\mu}$A, and magnetocurrent ratio or 55% in Si-based MTT are obtained at 77K. These results suggest a promising candidate for future spintronic applications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.10
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• pp.1927-1934
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• 2016

In this paper, we proposed a I-gate n-MOSFET (n-type Metal Oxide Semiconductors Field Effect Transistor) structure in order to mitigate a radiation-induced leakage current path in an isolation oxide interface of a silicon-based standard n-MOSFET. The proposed I-gate n-MOSFET structure was designed by using a layout modification technology in the standard 0.18um CMOS (Complementary Metal Oxide Semiconductor) process, this structure supplements the structural drawbacks of conventional radiation-tolerant electronic device using layout modification technology such as an ELT (Enclosed Layout Transistor) and a DGA (Dummy Gate-Assisted) n-MOSFET. Thus, in comparison with the conventional structures, it can ensure expandability of a circuit design in a semiconductor-chip fabrication. Also for verification of a radiation-tolerant characteristic, we carried out M&S (Modeling and Simulation) using TCAD 3D (Technology Computer Aided Design 3-dimension) tool. As a results, we had confirmed the radiation-tolerant characteristic of the I-gate n-MOSFET structure.