• Title/Summary/Keyword: memory tag

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MarSel : LD based tagSNP Selection System for Large-scale SNP Haplotype Dataset (MarSel : 대용량 SNP 일배체형 데이터에 대한 연관불균형기반의 tagSNP 선택 시스템)

  • Kim Sang-Jun;Yeo Sang-Soo;Kim Sung-Kwon
    • The KIPS Transactions:PartA
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    • v.13A no.1 s.98
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    • pp.79-86
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    • 2006
  • Recently the tagSNP selection problem has been researched for reducing the cost of association studies between human's diversities and SNPs. General approach for this problem is that all of SNPs are separated into appropriate blocks and then tagSNPs are chosen in each block. Marsel in this paper is the system that involved the concept of linkage disequilibrium for overcoming the problem that the existing block partitioning approaches have short of biological meanings. In most approaches, the contiguous regions, which recombinations have LD coefficient |D'| and then tagSNP selection step is performed. And MarSel guarantees the minimum tagSNP selection using entropy-based optimal selection algorithm when tagSNPs are chosen in each block, and enables chromosome-level association studies using efficient memory management technique when input is very large-scale dataset that is impossible to be processed in the existing systems.

An Energy Efficient and High Performance Data Cache Structure Utilizing Tag History of Cache Addresses (캐시 주소의 태그 이력을 활용한 에너지 효율적 고성능 데이터 캐시 구조)

  • Moon, Hyun-Ju;Jee, Sung-Hyun
    • The KIPS Transactions:PartA
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    • v.14A no.1 s.105
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    • pp.55-62
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    • 2007
  • Uptime of embedded processors for mobile devices are dependent on battery consumption. Especially the large portion of power consumption is known to be due to cache management in embedded processors. This paper proposes an energy efficient data cache structure for high performance embedded processors. High performance prefetching data cache issues prefetching instructions before issuing demand-fetch instructions based on reference predictions. These prefetching instruction bring reduction on memory delay by improving cache hit ratio, but on the other hand those increase energy consumption in proportion to the number of prefetching instructions. In this paper, we adopt tag history table on prefetching data cache for reducing energy consumption by minimizing parallel tag comparison. Experimental results show the proposed data cache improves performance on energy consumption as well as memory delay.

A Secure Protocol for High-Performance RFID Tag (고기능 RFID 태그를 위한 보안 프로토콜)

  • Park, Jin-Sung;Choi, Myung-Ryul
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.54 no.4
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    • pp.217-223
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    • 2005
  • In this paper, we have proposed a secure dynamic ID allocation protocol using mutual authentication on the RFID tag. Currently, there are many security protocols focused on the low-price RFID tag. The conventional low-price tags have limitation of computing power and rewritability of memory. The proposed secure dynamic ID allocation protocol targets to the high-performance RFID tags which have more powerful performance than conventional low-price tag by allocating a dynamic ID to RFID using mutual authentication based on symmetric encryption algorithm. This protocol can be used as a partial solution for ID tracing and forgery.

Design and analysis of RF-DC power conversion circuit (무선 전력변환장치의 전력변환 회로에 대한 설계 및 분석)

  • Kim, Yong-Sang;Im, Sang-Uk;Lee, Yong-Je;Kim, Yang-Mo
    • Proceedings of the KIEE Conference
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    • 2003.11b
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    • pp.35-42
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    • 2003
  • We have studied DC energy conversion of RF card by wireless communication. In order to attain an objective, it used the system which is a Rectenna. The main purpose of energy conversion system is the operation of the circuits at RF-ID system. The proposed RF-ID system is a lot classified with the reader and tag. Reader is a kind of the base station role supporting RF energy. And priority tag convert RF energy from the reader it was delivered with a wireless to DC energy. The energy which is converted like Tag. It transmits to the reader characteristic ID of each card. The tag is mainly divided into rectifier, power module, memory and controller. The FRAM maintains the data like a ROM in no-power situation. And the advantage is a low power element compared with other EEPROM. There are two considerations, when RF energy is converted into DC source by wireless. One is energy amount supported from the reader, the other is high power efficiency. This paper presents a study of simulation and experiments on the RF-DC conversion circuit in tag by the power efficiency concentrated.

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Design of 900MHz RFID Educational System (900MHz RFID 교육용 시스템의 설계)

  • Oh, Do-Bong;Kim, Dae-Hee;Jung, Joong-soo;Jung, Kwang-wook
    • Proceedings of the Korea Contents Association Conference
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    • 2009.05a
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    • pp.515-520
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    • 2009
  • This paper presents the software design of RFID Educational system based on using 900MHz air interface between the reader and the tag. Software of the reader and active tag is developed on embedded environment and the software of PC controlling the reader is on window OS. ATmega128 processor is used for H/W of the reader and active tag, and C language is used for their developing. Programming on window OS used MFC. Main functions of this system are to control tag containing EPC global Data by PC through the reader, to obtain information of tag through the internet and to read/write data on tag memory. Software design of 900MHz RFID educational system is done on the basis of these functions.

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Cooperative Data Stream Filtering for Sensor Tag (센서태그 통합 데이터 필터링에 관한 연구)

  • Ryu, Seung-Wan;Oh, Seul-Ki;Park, Sei-Kwon;Oh, Dong-Ok
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.8A
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    • pp.683-690
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    • 2011
  • The conventional sensor tag data filtering algorithm uses time window based data filtering for each tag data. However, this approach shows many performance problems such as low error and event detection rate and larger storage size requirement. In this paper, we propose a collaborative sensor tag data filtering algorithm to improve sensor data processing performance. simulation study shows that the proposed sensor tag filtering algorithm outperforms the conventional filtering algorithm in terms of the processing time, the size of required data storage memory and accuracy of error and event detection rate.

Low Power UHF Tag Chip Design (저 전력 UHF 태그 칩 설계)

  • Kwon, Hyuk-Je;Lee, Pyeong-Han;Lee, Chul-Hee;Kim, Chong-Kyo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.12
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    • pp.47-56
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    • 2008
  • An RFID system comprises a reader and a tag, and this paper focuses on a tag design. A UHF tag is activated by energy supply using electromagnetic waves and energy reflection through impedance mismatching. The tag uses a $0.25{\mu}m$ CMOS process and comprises a digital part executing tag protocols, a 512-bit memory, and an analog part having a rectifier, a modulation/demodulation unit, a clock generator, etc. The total dimension of the tag, including a saw line, is $750{\mu}m*750{\mu}m$ and the power consumption of the tag consumption power is about $17.8{\mu}W$ at a supply voltage of 2V.

High Security FeRAM-Based EPC C1G2 UHF (860 MHz-960 MHz) Passive RFID Tag Chip

  • Kang, Hee-Bok;Hong, Suk-Kyoung;Song, Yong-Wook;Sung, Man-Young;Choi, Bok-Gil;Chung, Jin-Yong;Lee, Jong-Wook
    • ETRI Journal
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    • v.30 no.6
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    • pp.826-832
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    • 2008
  • The metal-ferroelectric-metal (MFM) capacitor in the ferroelectric random access memory (FeRAM) embedded RFID chip is used in both the memory cell region and the peripheral analog and digital circuit area for capacitance parameter control. The capacitance value of the MFM capacitor is about 30 times larger than that of conventional capacitors, such as the poly-insulator-poly (PIP) capacitor and the metal-insulator-metal (MIM) capacitor. An MFM capacitor directly stacked over the analog and memory circuit region can share the layout area with the circuit region; thus, the chip size can be reduced by about 60%. The energy transformation efficiency using the MFM scheme is higher than that of the PIP scheme in RFID chips. The radio frequency operational signal properties using circuits with MFM capacitors are almost the same as or better than with PIP, MIM, and MOS capacitors. For the default value specification requirement, the default set cell is designed with an additional dummy cell.

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Reducing Power Consumption of Data Caches for Embedded Processors (임베디드 프로세서를 위한 선인출 데이터캐시의 저전력화 방안)

  • Moon, Hyun-Ju;Jee, Sung-Hyun
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.44 no.1
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    • pp.1-9
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    • 2007
  • Since data caches used in modern embedded processors consume significant fraction of total processor power up to 40%, embedded processors need power-efficient high performance data caches. This paper proposes a prefetching data cache structure which pursuing low power consumption. We added tag history table on existing data cache structure which includes hardware unit for data prefetching so that reduce the number of parallel lookup on tag memory. This strategic cache structure remarkably reduces power consumption for parallel tag lookup. Experimental results show that the proposed cache architecture induce low power consumption while maintain the same cache performance.

All Inkjet Printed Plastic RFID Tag

  • Cho, Gyou-Jin;Song, Jae-Hee;Jung, Min-Hoon;Lee, Bock-Im;Kim, Sun-Hee;Lim, Nam-Soo;Lee, Na-Young
    • Proceedings of the Polymer Society of Korea Conference
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    • 2006.10a
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    • pp.171-171
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    • 2006
  • In this presentation, we would like to report an inkjet printing method to produce 1 to 2 bit RFID tag working in the range of 6 to 28 MHz with or without transistors. The inkjet printing method especially for the formation of transistors, inductors, capacitors will be presented by the view of polymer chemistry. This presentation also includes the printing schemes for memory cell, ring oscillator, rectifier, antenna, and so forth for constructing RFID tag. I illustrate these strategies by describing recent my works on the formation of all SWNT-TFT and conducting polymer-silver nanocomposite inks that can be applied in the construction of electronic devices.

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