• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.3
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• pp.355-366
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• 2022

This paper proposes a microcode-based neural network accelerator controller for artificial intelligence accelerators that can be reconstructed using a programmable architecture and provide the advantages of low-power and ultra-small chip size. In order for the target accelerator to support various neural network models, the neural network model can be converted into microcode through microcode compiler and mounted on accelerator to control the operators of the accelerator such as datapath and memory access. While the proposed controller and accelerator can run various CNN models, in this paper, we tested them using the YOLOv2-Tiny CNN model. Using a system clock of 200 MHz, the Controller and accelerator achieved an inference time of 137.9 ms/image for VOC 2012 dataset to detect object, 99.5ms/image for mask detection dataset to detect wearing mask. When implementing an accelerator equipped with the proposed controller as a silicon chip, the gate count is 618,388, which corresponds to 65.5% reduction in chip area compared with an accelerator employing a CPU-based controller (RISC-V).

• The Journal of the Acoustical Society of Korea
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• v.20 no.1E
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• pp.14-19
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• 2001

We have proposed BIST method and circuit for embedded 16M SDRAM with logic. It can test the AC parameter of embedded 16M SDRAM using the BIST circuit capable of detecting the address of a fail cell installed in an Merged Memory with Logic(MML). It generates the information of repair for redundancy circuit. The function and AC parameter of the embedded memory can also be tested using the proposed BIST method. It is possible to test the embedded SDRAM without external test pin. The total gate of the BIST circuit is approximately 4,500 in the case of synthesizing by 0.25μm cell library and is verified by Verilog simulation. The test time of each one AC parameter is about 200ms using 2Y-March 14n algorithm.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.399-402
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• 2004

This paper presents a system-on-chip prototype implementing a full integration for a portable digital audio system. The chip is composed of a audio processor block to implements audio decoding and voice compression or decompression software, a system control block including 8-bit MCU core and Memory Management Unit (MMU) a low power 16-bit ${\Sigma}{\Delta}$ CODEC, two DC-to-BC converter, and a flash memory controller. In order to support other audio algorithms except Mask ROM type's fixed codes, a novel 16-bit fixed-point DSP core with the program-download architecture is proposed. Funker, an efficient power management technique such as task-based clock management is implemented to reduce power consumption for portable application. The proposed chip has been fabricated with a 4 metal 0.25um CMOS technology and the chip area is about 7.1 mm ${\times}$ 7.1mm with 100mW power dissipation at 2.5V power supply.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.651-654
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• 2005

In this paper, we designed ECC(Elliptic Curve Cryptographic) Processor with Bus-splitting mothod for embedded SoC. ECC SIP is designed by VHDL RTL modeling, and implemented reusably through the procedure of logic synthesis, simulation and FPGA verification. To communicate with ARM9 core and SIP, we designed SIP bus functional model according to AMBA AHB specification. The design of ECC Processor for platform-based SoC is implemented using the design kit which is composed of many devices such as ARM9 RISC core, memory, UART, interrupt controller, FPGA and so on. We performed software design on the ARM9 core for SIP and peripherals control, memory address mapping and so on.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.1053-1056
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• 2004

Chunghwa Picture Tubes, LTD. (CPT) has developed a Novel TFT-LCD Driving Techniquel. This new technique is developed in combination with other state-of-the-art image processing solutions such as image compression / decompression, motion detection, and noise reduction. By applying the Novel Driving Technique to the high resolution TFT-LCD, it was found that the response time can be effectively reduced with a lower overall system cost by smaller frame memory requirement, lower EMI by less memory band-width. Likewise, higher display quality can also be achieved in that the unexpected noises generated by over-drive can be eliminated. The Novel TFT-LCD Driving Technique has been successfully implemented to the 30 inch WXGA (1280${\times}$768) resolution TFT LCD commercial TV module. It was found that the quality of moving picture was better improved compared with that of the conventional fast response driving method.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.630-633
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• 2005

Some gases can be formed into hydrate by physical combination with water under appropriate temperature and pressure condition. Besides them, it was found that the pore size of the sediments can affect the formation and dissociation of hydrate. In this study, formation temperatures of carbon dioxide and methane hydrate have been measured using isobaric method to investigate the effects of flow rates of gases on formation condition of hydrate in porous rock samples. The flow rates of gases were controlled using a mass flow controller. To minimize Memory effect, system temperature increased for the dissociation of gas hydrates and re-established the initial saturation. The results show that the formation temperature of hydrate decreases with increasing the injection flow rate of gas. This indicates that the velocity of gas in porous media may act as kinds of inhibitor for the formation of hydrate.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.7
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• pp.1295-1300
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• 2001

This paper presents the system that decreases the Jitter value having an important effect for signal quality in optical disc memory. Level controller of input signal was made and applied to line between format generator and laser beam recorder of DVD. This try means to decrease jitter value without adjustment for many kinds of mastering process. Experimental results show that the jitter value is about 6.9%.

• Proceedings of the Korean Society for Noise and Vibration Engineering Conference
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• 2001.05a
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• pp.1122-1129
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• 2001

In this work, we propose a new type of HDD suspension featuring shape memory ally (SMA) actuator in order to prevent the contact between the slider and disk. The principal design parameters are obtained from the modal analysis using finite element analysis, and then the dynamic model is established to formulate the control scheme for Non-Contact Start/Stop mode drive. Subsequently, a robust Η$_{\infty}$, control algorithm is designed by integrating experimentally-obtained SMA actuator dynamics to the proposed suspension system. The controller is empirically realized and control results for different load/unload profiles are presented in time domain. In addition, the contact signal between the slider and disk is measured by the electrical resistance method.istance method.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.6
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• pp.1040-1048
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• 1987

We propose a hardware architecture called Multiring which is applicable for various geometrical operations on rectilinear objects such as design rule checking in VLSI layout and many image processing operations including noise suppression and coutour extraction. It has both a fast execution speed and extremely high flexibility. The whole architecture is mainly divided into four parts` I/O between host and Multiring, ring memory, linear processor array and instruction decoder. Data transmission between host and Multiring is bit serial thereby reducing the bandwidth requirement for teh channel and the number of external pins, while each row data in the bit map stored in ring memory is processed in the corresponding processor in full parallelism. Each processor is simultaneously configured by the instruction decoder/controller to perform one of the 16 basic instructions such as Boolean (AND, OR, NOT, and Copy), geometrical(Expand and Shrink), and I/O operations each ring cycle, which gives Multiring maximal flexibility in terms of design rule change or the instruction set enhancement. Correct functional behavior of Multiring was confirmed by successfully running a software simulator having one-to-one structural correspondence to the Multiring hardware.

• Journal of KSNVE
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• v.6 no.2
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• pp.205-214
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• 1996

Active noise control(ANC) requires the full capability of a modern digital signal processing module. This paper describes the digital signal processing unit which is designed for ANC of noise fields in passenger car. System hardware is designed to allow software controlled versatility as well as fully qutomatic operation. The developed system is provided with the ability to be self-operated except the case of upload/download of data and program between the personal computer and the system memory. Experimental results are presented to demonstrate ANC performance of noise fields in lightly damped enclosure and passenger car.