• Proceedings of the KIEE Conference
• /
• 2008.05a
• /
• pp.151-152
• /
• 2008

In this paper, a dual band LNA (Low Noise Amplifier) with a matching circuit using varactor diode is designed for 912MHz and 2450MHz RFID system. The operating frequency is controlled by the bias voltage applied to the varactor diode. The measured results demonstrate that gain is 13.6dB and 6.8dB at 912MHz and 2450MHz. The measured NF (Noise Figure) is 1.4dB and 3.1dB at 912MHz and 2450MHz, respectively.

• The Transactions of the Korean Institute of Electrical Engineers D
• /
• v.49 no.6
• /
• pp.316-321
• /
• 2000

In this paper, we proposed MBDD(Modified Binary Decision Diagram) as a multi-level logic synthesis method and a vertex of MBDD to NMOS transistors matching. A vertex in MBDD is matched to a set of NMOS transistors. MBDD structure can be achieved through transformation steps from BDD structure. MBDD can represent the same function with less vertices less number of NMOS transistors, consequently capacitance of the circuit can be reduced. Thus the power dissipation can be reduced. We applied MBDD to a full odder and a 4-2compressor. Comparing the 4-2compressor block with other synthesis logic, 31.2% reduction and 19.9% reduction was achieved in numbers of transistors and power dissipation respectively. In this simulation we used 0.8 ${\mu}{\textrm}{m}$ fabrication parameters.

• Journal of the Korean Institute of Telematics and Electronics B
• /
• v.28B no.7
• /
• pp.508-519
• /
• 1991

A new heuristic two-dimensional symbolic layout compaction approach is developed. After conventional one-dimensional compaction steps, all the components on the critical paths that define the height or width of the given layout are found and rearranged to reduce layout size. During this process, constraints in both x and y directions are considered and pitch-matching of ports for hierarchical compaction can be achieved to reduce the amount of the design data. This approach generated the smallest area for several examples we have tried when compared with other published results. The expected run time can be bouned by OT$_1$, where T$_1$ is the run time of a typical one-dimensional compactor.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.30A no.2
• /
• pp.16-21
• /
• 1993

A newly advanced method of characterizing large signal S-parameters of TR using the overall gain of normally operating TR is proposed based on the load pull method which gives the matching network only. Large signal S-parameters of TR are characterized from the circuit which consists of TR and 3dB Coupler Tuners at the input and output ports, and which is B class biased with 0dBminput signal. Amplifier can be designed to have 8.5dB gain at 770MHz using the calculated large signal S-parameters with the resulting gain of 8.786dB.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.31A no.1
• /
• pp.33-38
• /
• 1994

In this paper, waveguide banpass filters using H-plane step discontinuities are designed based on the field theory analysis and optimization of the resonator lengths as well as dimensions of discontinuities, instead of the conventional synthesis method based on the equivalent circuit. The waveguide inductive obstacles introduced by H-plane step discontinuities analyzed using mode-matching method and the generalized scattering parameters are derived. Using the derived scattering parameters of the discontinuities as well as those of resonators, waveguide bandpass filters are designed through optimization method, modified Razor search method proposed by J.H.Bandler. Using this design procedures, waveguide bandpass filters are designed and tested at X-band(center frequency 10GHz) as well as Ka-band(center frequency 35GHz).

• IEIE Transactions on Smart Processing and Computing
• /
• v.3 no.4
• /
• pp.161-166
• /
• 2014

An accurate gain-of-two amplifier, which successfully reduces the capacitor mismatch error is proposed. This amplifier has similar circuit complexity and linearity improvement to the capacitor error-averaging technique, but operates with two clock phases just like the conventional pipeline stage. This makes it suitable for high-speed, high-resolution analog-to-digital converters (ADCs). Two ADC architectures employing the proposed accurate gain-of-two amplifier are also presented. The simulation results show that the proposed ADCs can achieve 15-bit linearity with 8-bit capacitor matching.

• Journal of electromagnetic engineering and science
• /
• v.2 no.1
• /
• pp.11-15
• /
• 2002

In this paper, we have proposed the new configuration of wideband antenna using CPW fred lines. The proposed antenna has CPW feed lines and U-slot to achieve wade bandwidth with good impedance matching. The use of CPW feed line can decrease the number of substrates. It is compared with the conventional antenna find by a microstrip fled line. The parameters of CPW fred lines were studied by using the quasi-static approximation which is based on the conformal mapping method. The analysis of CPW discontinuities such as the tapered-step structure and the open ended gap were studied by using the quasi-static approximation which is based on the boundary element method. Also, the equivalent circuit model of multi-layer antenna were proposed using the cavity model. Experiment results of the proposed antenna 7how wide-bandwidth characteristics and good radiation patterns in passband.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.25 no.4
• /
• pp.487-490
• /
• 2014

This paper describes a design of an automotive radar frontend module with taking care of the routing of 77-GHz signals on a printed circuit board including wire-bond and waveguide transitions.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.28 no.4A
• /
• pp.232-237
• /
• 2003

We present the derivation of the loci of the reflection coefficient of a loaded transmission line on the Smith chart as the length of the transmission line is varied. The results show that the loci constitute a circle when the characteristic impedance of the transmission line differs from the normalizing one, whose center and radius are determined by the impedances of the load and the transmission line. The results can be used in the matching circuit design using microstriplines when line width and length should be compromised.

• Proceedings of the KIEE Conference
• /
• 2001.07c
• /
• pp.1829-1831
• /
• 2001

A novel multi-section power divider configuration is proposed to obtain wide-band frequency performance up to microwave frequency region. Design procedures for the proposed microwave broadband power divider are composed of a planar multi-section three-ports hybrid and a waveguide transformer design procedures. The multi-section power divider is based on design theory of the optimum quarter-wave transformer. Furthermore, in order to obtain the broadband isolation performance between the two adjacent output ports, the odd mode equivalent circuit should be matched by using the lossy element such as resistor. The derived design formula for calculating these odd mode matching elements is based on the singly terminated filter design theory. The waveguide transformer section is designed to suppress the propagation of the higher order modes such as waveguide modes due to employing the metallic electric wall. Simulation and experiment show excellent performance of multi section power divider.