• Title/Summary/Keyword: matching circuit

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Design of 24-GHz Power Amplifier for Automotive Collision Avoidance Radars (차량 추돌 방지 레이더용 24-GHz 전력 증폭기 설계)

  • Noh, Seok-Ho;Ryu, Jee-Youl
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.1
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    • pp.117-122
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    • 2016
  • In this paper, we propose 24-GHz CMOS radio frequency (RF) power amplifier for short-range automotive collision avoidance radars. This circuit contains common source stage with inter-stages conjugate matching circuit as a class-A mode amplifier. The proposed circuit is designed using TSMC $0.13-{\mu}m$ mixed signal/RF CMOS process ($f_T/f_{MAX}=120/140GHz$). It operates at the supply voltage of 2V, and it is designed to have high power gain, low insertion loss and low noise figure in the low supply voltage. To reduce total chip area, the circuit used transmission lines instead of the bulky real inductor. The designed CMOS power amplifier showed the smallest chip size of $0.1mm^2$, the lowest power consumption of 40mW, the highest power gain of 26.5dB, the highest saturated output power of 19.2dBm and the highest maximum power-added efficiency of 17.2% as compared to recently reported results.

Matching Algorithm for PCB Inspection Using Vision System (Vision System을 이용한 PCB 검사 매칭 알고리즘)

  • An, Eung-Seop;Jang, Il-Young;Lee, Jae-Kang;Kim, Il-Hwan
    • Journal of Industrial Technology
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    • v.21 no.B
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    • pp.67-74
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    • 2001
  • According as the patterns of PCB (Printed Circuit Board) become denser and complicated, quality and accuracy of PCB influence the performance of final product. It's attempted to obtain trust of 100% about all of parts. Because human inspection in mass-production manufacturing facilities are both time-consuming and very expensive, the automation of visual inspection has been attempted for many years. Thus, automatic visual inspection of PCB is required. In this paper, we used an algorithm which compares the reference PCB patterns and the input PCB patterns are separated an object and a scene by filtering and edge detection. And than compare two image using pattern matching algorithm. We suggest an defect inspection algorithm in PCB pattern, to be satisfied low cost, high speed, high performance and flexibility on the basis of $640{\times}480$ binary pattern.

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Robust $H_{\infty}$ Controller Design for Steam Generator Water Level Control using Mixed $H_{\infty}$ Optimization Method (혼합 $H_{\infty}$ 최적화 기법을 이용한 견실 $H_{\infty}$ 증기발생기 수위제어기 설계)

  • 서성환;조희수;박홍배
    • Journal of Institute of Control, Robotics and Systems
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    • v.5 no.3
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    • pp.363-369
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    • 1999
  • In this paper, we design the robust $H_{\infty}$ controller for water level control of steam generator using a mixed $H_{\infty}$ optimization with model-matching method. Firstly we choose the desired model which has good disturbance rejection performance. Secondly we design a stabilizing controller to keep the model-matching error small and also provide sufficiently large stability margin against additive perturbations of the nominal plant. Simulation results show that proposed robust $H_{\infty}$ controller at specific power operation has satisfactory performances against the variations of load power, steam flow rate, primary circuit coolant temperature, and feedwater temperature. It can be also observed that the proposed robust $H_{\infty}$ controller exhibits better robust stability than conventional PI controller.

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An Accurate and Matching-Free MOSFET's Threshold Voltage Extraction Using New Novel Circuit Thencique (새로운 회로기술을 이용한 고정밀 Matching-Free MOSFET 문턱전압 추출)

  • 유종근;신남승;박종태
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.1
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    • pp.166-178
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    • 1995
  • An accurate threshold voltage extraction scheme for MOS transistors is presented. In contrast to alternative methods recently reported in the literature, this scheme does not need matched replica of the transistor under test, and thus can be applied more effectively and accurately to raal-time on-chip applications where threshold voltage measurements are required for many transistors with various geometries and bias conditions. The proposed scheme is accurately implemented in a matching-free way using a ratio-indepentent switched-capacitor subtracting amplifier and a dynamic current mirror. Nonideal effects associated with these circuits have been investiggated and compensated.

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Design and Implementation of Motion Estimation VLSI Processor using Block Matching Algorithm (완전탐색 블럭정합 알고리듬을 이용한 움직임 추정기의 VLSI 설계 및 구현)

  • 이용훈;권용무;박호근;류근장;김형곤;이문기
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.9
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    • pp.76-84
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    • 1994
  • This paper presents a new high-performance VLSI architecture and VLSI implementation for full-search block matching algorithm. The proposed VLSI architecture has the feature of two directional parallel and pipeline processing, thereby reducing the PE idle time at which the direction of block matching operation within the search area is changed. Therfore, the proposed architecture is faster than the existing architectures under the same clock frequency. Based on HSPICE circuit simulation, it is verified that the implemented procesing element is operated successfully within 13 ns for 75 MHz operation.

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A study on the design technologies for the 1-state 23GHz LNAs (23GHz대 1단 저잡음 증폭기의 설계 기술에 관한 연구)

  • 장동필;안동식
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.5
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    • pp.974-980
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    • 1997
  • The 23GHz 1-state LNA was designed by using MPIE numerical analysis and conventional design EEsof softwares. The circuit was designed using conventional tools but analyzed and modified by using numerical MPIE tools. he matching sections was designed with parallel coupled filter-type, which gives impedance matching and DC blocking and has small discontinuities. THe FET chip is directly attached to the graound metal. The designed LNA gives 5.8dB gain and 2.5dB noise figure withoug considering the loss and impedance shift of connectors that degenerate the gain and noise figure considerably. this results gives very promising characteristics for our design process and matching schemes and fabrication technologies.

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A New Design-for-Testability Circuit for Low Noise Amplifiers (저잡음 증폭기를 위한 새로운 구조의 검사용 설계회로)

  • Ryu Jee-Youl;Noh Seok-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.3 s.345
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    • pp.68-77
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    • 2006
  • This paper presents a new Design-for-Testability (DfT) circuit for 4.5-5.5GHz low noise amplifiers (LNAs). The DfT circuit measures gain, noise figure, input impedance, input return loss, and output signal-to-noise ratio for the LNA without external expensive equipment. The DfT circuit is designed using 0.18m SiGe technology. The circuit utilizes input impedance matching and DC output voltage measurements. The technique is simple and inexpensive.

(Development of 100[W] Border Light using Color Mixing Technique by Simple-Inverse Matching Method) (Simple-Inverse Matching 혼색기법을 이용한 100[W] 무대조명 개발)

  • Youn, Jin-Sik;Song, Sang-Bin;Lim, Young-Cheol;Park, Joung-Wook;Hong, Jin-Pyo
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.24 no.12
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    • pp.38-46
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    • 2010
  • For the development of 100[W] stage lighting, quantitative and uniform color mixing that applied through color adopted Simple-Inverse matching so that color mixing can be possible along Black Body Locus. R,G,B(Red, Green, Blue) LED(Light Emitting Diode) arrangement through LED package character analysis, LED module, and the characteristic of device were considered for uniform color mixing. A distance changeable optical device was built to assure high uniformity and high diffusion of not only the middle of diffusion side but also the border side. Also, we developed the control power circuit that can expand up to 6 channels which are possible for quantitative color mixing, and the high uniformity and high quantified border light for color mixing control and the verification of color mixing characteristics by composing GUI(Graphical user interface) including color mixing simulator. By presenting the experimental results of light color control, we proved the usefulness of our developed border light and the proposed color mixing method.

Setting of the Operating Conditions of Stereo CCTV Cameras by Weather Condition

  • Moon, Kwang;Pyeon, Mu Wook;Lee, Soo Bong;Lee, Do Rim
    • Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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    • v.32 no.6
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    • pp.591-597
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    • 2014
  • A wide variety of image application methods, such as aerial image, terrestrial image, terrestrial laser, and stereo image point are currently under investigation to develop three-dimensional 3D geospatial information. In this study, matching points, which are needed to build a 3D model, were examined under diverse weather conditions by analyzing the stereo images recorded by closed circuit television (CCTV) cameras installed in the U-City. The tests on illuminance and precipitation conditions showed that the changes in the number of matching points were very sensitively correlated with the changes in the illuminance levels. Based on the performances of the CCTV cameras used in the test, this study was able to identify the optimal values of the shutter speed and iris. As a result, compared to an automatic control mode, improved matching points may be obtained for images filmed using the data obtained through this test in relation to different weather and illuminance conditions.

A Study on the Fabrication Technologies for the 23 GHz 2-Stage LNA (23 GHz대 2단 저잡음 증폭기의 제작기술에 관한 연구)

  • 안동식;장동필
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.8 no.1
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    • pp.52-60
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    • 1997
  • A 23GHz 2-stage LNA was designed using MPIE numerical analysis and microwave CAD EEsof softwares. The basic circuit was designed by EEsof tools but analyzed more precisely using numerical MPIE tools and modified. The matching sections of the input and output terminals were designed with paralledl coupled filter-type lines, these matching sections perform impedance matching and DC blocking, more over have the advantages of small discontinuities and small errors in the design process. The FET chip is directly attached to the ground metal. The designed LNA gives 15.2dB gain and 2.7dB noise figure. without considering 1.8dB loss of connectors. These results validate our design process and matching schemes and fabrication technologies over the 20GHz frequency range.

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