• ETRI Journal
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• v.42 no.4
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• pp.468-479
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• 2020

The proposed AI processor architecture has high throughput for accelerating the neural network and reduces the external memory bandwidth required for processing the neural network. For achieving high throughput, the proposed super thread core (STC) includes 128 × 128 nano cores operating at the clock frequency of 1.2 GHz. The function-safe architecture is proposed for a fault-tolerance system such as an electronics system for autonomous cars. The general-purpose processor (GPP) core is integrated with STC for controlling the STC and processing the AI algorithm. It has a self-recovering cache and dynamic lockstep function. The function-safe design has proved the fault performance has ASIL D of ISO26262 standard fault tolerance levels. Therefore, the entire AI processor is fabricated via the 28-nm CMOS process as a prototype chip. Its peak computing performance is 40 TFLOPS at 1.2 GHz with the supply voltage of 1.1 V. The measured energy efficiency is 1.3 TOPS/W. A GPP for control with a function-safe design can have ISO26262 ASIL-D with the single-point fault-tolerance rate of 99.64%.

• Journal of Korea Game Society
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• v.9 no.5
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• pp.13-24
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• 2009

The research about methodology to educate professional storytellers should be done very actively. As many people became interested in digital storytelling lately, many theoretical researches about game storytelling are being made in varied aspects. However, systematic methodology to educate game storytellers still remains in theoretic level, so that we can hardly find the outputs brought by the fusion of practical and theoretical knowledges. In this paper, I made a list of 4 core e1ements(character, event, world view, interactive factors of game) which construct the narratives of games to elevate the quality of practical game storytelling. The goal of this research is to complete the practical information list in detail, in order to deliver storytellers' creative ideas precisely to the game designers in every parts.

• Nuclear Engineering and Technology
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• v.53 no.4
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• pp.1146-1156
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• 2021

Single-unit probabilistic safety assessment (SUPSA) has complex Boolean logic equations for accident sequences. Multi-unit probabilistic safety assessment (MUPSA) model is developed by revising and combining SUPSA models in order to reflect plant state combinations (PSCs). These PSCs represent combinations of core damage and non-core damage states of nuclear power plants (NPPs). Since all these Boolean logic equations have complemented gates (not gates), it is not easy to generate exact Boolean solutions. Delete-term approximation method (DTAM) has been widely applied for generating approximate minimal cut sets (MCSs) from the complex Boolean logic equations with complemented gates. By applying DTAM, approximate conditional core damage probability (CCDP) has been calculated in SUPSA and MUPSA. It was found that CCDP calculated by DTAM was overestimated when complemented gates have non-rare events. Especially, the CCDP overestimation drastically increases if seismic SUPSA or MUPSA has complemented gates with many non-rare events. The objective of this study is to suggest a new quantification method named probability subtraction method (PSM) that replaces DTAM. The PSM calculates accurate CCDP even when SUPSA or MUPSA has complemented gates with many non-rare events. In this paper, the PSM is explained, and the accuracy of the PSM is validated by its applications to a few MUPSAs.

• Journal of the Korea Society of Computer and Information
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• v.17 no.1
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• pp.1-10
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• 2012

Improving operating frequency of processors is no longer today's issues; a multiprocessor technique which integrates many processors has received increasing attention. Currently, high-performance processors that integrate 64 or 128 cores are developing for large data processing over 2, 4, or 8 processor cores. This paper proposes an optimal many-core processor for synthesizing guitar sounds. Unlike the previous research in which a processing element (PE) was assigned to support one of guitar strings, this paper evaluates the impacts of mapping different numbers of PEs to one guitar string in terms of performance and both area and energy efficiencies using architectural and workload simulations. Experimental results show that the maximum area energy efficiencies were achieved at PEs=24 and 96, respectively, for synthesizing guitar sounds with sampling rate of 44.1kHz and 16-bit quantization. The synthesized sounds were very similar to original guitar sounds in their spectra. In addition, the proposed many-core processor was 1,235 and 22 times better than TI TMS320C6416 in area and energy efficiencies, respectively.

• Proceedings of the Korea Association of Information Systems Conference
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• 2003.05a
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• pp.45-54
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• 2003

Over the past decade, the unprecedented internet revolution has dramatically altered many core aspects of out daily business and personal lives. Many of these fundamental changes have completely transformed traditional communication mechanism, boosted productivity, opened up new marketing opportunities, and given birth to entirely new applications in the world of eCommerce and eBusiness. But Many web applications doesn't connect with real-world device such as lights, pumps, and Motors avaiable over the Internet. In this paper We introduce XML and presents way it can be used with I/O system.

• Korean Institute of Interior Design Journal
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• v.13 no.6
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• pp.74-81
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• 2004

Much evidence points to the fact that Korean traditional architecture has long reflected traditional Korean philosophy. If what this evidence points to Is true, there is much more insight to be gained about this connection. It is important to begin with the idea that Korean culture stemmed from Confucianism, Buddhism, and Taoism. All three share similar ideas, and this study will set out to prove that topology, an anti-Euclidean school of thought created at the end of the 19th century, shares many of the same core ideas as the three mentioned above. Transitively, if Korean traditional culture is reflected in Korean traditional architecture, and topology shares many of the same core ideas, it seems that topology should be accepted into the mainstream of architectural design. This study will aim to interpret space structure forms and space constructions of the Korean traditional architecture from the topological perspective.

• Journal of Navigation and Port Research
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• v.28 no.4
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• pp.299-303
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• 2004

In the Internet, to guarantee transmission rate and delay and to achieve fair bandwidth allocation, many per-flow scheduling algorithms, such as fair queueing, which have many desirable properties for congestion control, have been proposed and designed. However, algorithms based on per-flow need maintain rate state, buffer management and packet scheduling, so that it cost great deal ： implement. Therefore, in this paper, to implement routers cost-effectively, we propose CS-FNE algorithm based on FNE in Core-Stateless network We evaluate CS-FNE comparing with four additional algorithms i.e., CSFQ, FRED, RED and DRR, in several different, configurations and traffic sources. Through simulation results, we show that CS-FNE algorithm can allocate fair bandwidth approximately and is simpler and easier to implement than other per-flow basis queueing mechanisms.

• Journal of Applied Reliability
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• v.3 no.1
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• pp.41-58
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• 2003

Recently, the reliability evaluation and analysis are applied for many industrial products, and many products are required to guarantee in quality and in efficiency. The purpose of this paper is to present some of reliability prediction methodologies that are applicable to machine tools. Especially ATC (Automatic Tool Changer) and Interface Card of PC-NC, which are core components of the machine tools, were chosen as the target of the reliability evaluation and analysis. The results of this research has shown the failure rate, MTBF(Mean Time Between Failure), and reliability for those components. It is expected that proposed methodologies will be applicable to evaluation of reliability for other industrial products.

• Proceedings of the KIEE Conference
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• 2004.07e
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• pp.49-51
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• 2004

This paper researched the power loss characteristics according to winding method of high frequency transformer. Power loss was analyzed by PExprt using FEM software. The ferrite core model for analysis be used the EE type. Transformer model objected type applied to flyback converter. Therefore, analysis result was obtained the many parameter of DC, AC resistance, leakage inductance, copper loss, core loss, and temperature etc.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.1103-1106
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• 1999

Telegram is an indispensible information & telecommunication system to our daily life. VTS(Voice Telegram System) under intensive research is intended to enhance exchanging capability of information & telecommunication by adding voice media to existing telegram system. Overall configuration and necessary core technologies of the system were investigated for its development. Among those many technologies in need, the technology of compressing and recording data is most critical to the development of cheap hardware. This is so called vocoder algorithm and is the core technology of voice information system. So, here, vocoder algorithm now being studied will be introduced.