• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2011.11a
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• pp.147-149
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• 2011

사용자에게 편리한 인터페이스를 제공하는 IT 기기가 널리 보급되면서 직관적인 인터페이스 기술에 대한 관심이 높아지고 있다. 이미지 센서로 입력된 사람의 손 모양이나 움직임을 이용하는 인터페이스가 그 중 하나이다. 한 편 이미지 센서 영상을 저장하기 위하여 H.264/AVC와 같은 영상 압축 기술이 사용된다. 영상을 압축하기 위해 부호기는 모든 Macroblock에서 움직임 추정을 수행한다. 추정된 움직임 정보는 손 움직임을 인식하는데 사용될 수 있고 이를 통해 전자 기기에 명령을 내리는 인터페이스 기술의 한 부분을 구현하는 것이 가능하다. 본 논문은 H.264/AVC 부호기의 Motion Vector를 이용하는 손 추적 알고리즘을 제시한다. 제시된 알고리즘은 손 움직임 추적의 정확도를 향상시키기 위하여 Motion Vector보다 신뢰도가 높은 Motion Density Map 정보를 사용한다. 이 정보를 이용하여 이동한 손을 포함하는 손 윈도우를 결정한다. 실험 결과를 통하여 제시된 알고리즘이 손의 움직임을 추적하는 것을 확인할 수 있다.

• ETRI Journal
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• v.28 no.2
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• pp.239-242
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• 2006

In this letter, we propose a new functionality to scalable video coding (SVC), that is, the support of multiple region of interests (ROIs) for heterogeneous display resolution. The main objective of SVC is to provide temporal, spatial, and quality scalability of an encoded bitstream. The ROI is an area that is semantically important to a particular user, especially users with heterogeneous display resolutions. Less transmission bandwidth is needed compared to when the entire region is transmitted/decoded and then sub-sampled or cropped. To support multiple ROIs in SVC, we adopt flexible macroblock ordering (FMO), a tool defined in H.264, and based on it, we propose a way to encode and, independently, decode ROIs. The proposed method is implemented on the joint scalable video model (JSVM) and its functionality verified.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.2067-2070
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• 2002

In this paper, a VLSI architecture for transform and quantization module, which consists of 2D-DCT, quantization, AC/DC prediction block, scan conversion, inverse quantization and 2D-IDCT, is presented. The architecture of the module is designed to handle a macroblock data within 1064 cycles and suitable for MPEG-4 video codec handling CIF image formats. Only single 1-D DCT/IDCT cores are used for the design instead of 2-D DCT/IDCT, respectively. 1-bit serial distributed arithmetic architecture is adopted for 1-D DCT/IDCT to reduce the hardware area in this architecture. As the result, the maximum utilization of hardware can be achieved, and power consumption can be minimized. The proposed design is operated on 27MHz clock. The experimental results show that the accuracy of DCT and IDCT meet the IEEE specification.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.291-292
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• 2006

This paper presents rate-distortion optimization that is considered sequence statistics(complexity) to choose the best macroblock mode decision in H.264. In previous work, Lagrange multiplier is derived by the function of constant value 0.85 and QP so that is not the proper Lagrange multilplier for any image sequence. The proposed algorithm solves the problem by changing constant value 0.85 into adaptive value which is influenced by image complexity, and by reducing the encoder complexity to estimate the image statistics with the multiplication of transformed, quantized rate and distortion. Proposed algorithm is achieved the bit-rate saving up to 5% better than previous method.

• Journal of information and communication convergence engineering
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• v.5 no.3
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• pp.269-272
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• 2007

The shortcut shot detection based on MPEG compressed video bitstream is presented in this paper. The detection algorithm is used the video picture frame from MPEG compressed video directly not to be decompressed the original image. For shortcut detection, I and P frame of MPEG video bitstream are classified. The changing scene cuts at I pictures are detected by the decompressed DC image and scene cuts at P picture frame by monitoring the percentage of intra-macroblocks per P picture are detected. Experimental results using test video bitstream QVGA results in average 92% detection rate, searching time is taken around 4.5 times faster in comparison with changing scene shot detection algorithm which is decompressed the compressed bitstream.

• ETRI Journal
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• v.33 no.4
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• pp.641-644
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• 2011

In this letter, we propose a novel bitrate control, using both Kalman and FIR filters, based on a Hamiltonian analysis with respect to the amount of bits from each macroblock, in an encoding of a general video codec such as H.264/AVC. Since the proposed bitrate control is based on the simple computation of an optimal control method based on the Hamiltonian analysis, it is not necessary to use additional computation, such as a DCT or quantization, to estimate the bits for bitrate control. As a result, the proposed algorithm can be applied to single-pass encoding and can provide sufficient encoding speed with respect to various applications, even those requiring real-time control.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.1
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• pp.33-39
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• 2011

H.264 decoders usually have pipeline architecture by a macroblock or a 4 ${\times}$ 4 sub-block. The period of the pipeline is usually fixed to guarantee the operation in the worst case which results in many idle cycles and higher data bandwidth. Adaptive pipeline architecture for H.264 decoders has been proposed for efficient decoding and lower the requirement of the bandwidth for the memory bus. However, it requires a controller for the adaptive priority control to utilize the advantage. We propose a smart bus arbiter that replaces the controller. It is introduced to adjust the priority adaptively the QoS (Quality of Service) control of the decoding process. The smart arbiter can be integrated the arbiter of bus systems and it works when certain conditions are met so that it does not affect the original functions of the arbiter. An H.264 decoder using the proposed architecture is designed and implemented to verify the operation using an FPGA.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.8
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• pp.1776-1784
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• 2003

In this paper, we propose the architecture of stream producer for MPEG­4 Video encoding. This module receives the quantized coefficient from DCT and Quantization module in macroblock unit and performs the VLC coding according to the encoding mode, and supports the error concealment mode of MPEG­4 and data partitioning mode. Using the VHDL, we designed the module using this architecture and performed the evaluations of this module by performing the post­-simulation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.8B
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• pp.1438-1443
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• 1999

In this paper, we propose detection methods for gradual scene changes such as dissolve, pan, and zoom. The proposal method to detect a dissolve region uses scene features based on spatial statistics of the image. The spatial statistics to define shot boundaries are derived from squared means within each local area. We also propose a method of the camera motion detection using four representative motion vectors in the background. Representative motion vectors are derived from macroblock motion vectors which are directly extracted from MPEG streams. To reduce the implementation time, we use DC sequences rather than fully decoded MPEG video. In addition, to detect the gradual scene change region precisely, we use all types of the MPEG frames(I, P, B frame). Simulation results show that the proposed detection methods perform better than existing methods.

• Proceedings of the Korea Information Processing Society Conference
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• 2006.11a
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• pp.133-136
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• 2006

제안한 방법은 H.264 옵티컬 플로워 방법을 이용하여 손실된 매크로블록의 움직임 벡터를 $4{\times}4$ 단위로 복원하는 알고리즘을 제안했다. 제안하는 알고리즘은 옵티컬 플로워 기반의 움직임벡터 복원 기법에서의 문제점인 높은 복잡도를 해결하기 위해서 최소 $4{\times}4$ 단위에서의 움직임 벡터 정보를 포함하는 H.264 부호화 표준의 특성을 이용하여 정확한 초기값에서 출발함으로써 계산량을 줄임과 동시에 Optical Flow Region을 4개의 $16{\times}16$ 크기로 제한함으로써 기존보다 복잡도를 크게 줄일 수 있었다.