• Journal of Sensor Science and Technology
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• v.11 no.2
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• pp.77-83
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• 2002

In order to get low cost and portability, semiconductor gas sensor need to have low operating temperature and high sensitivity. $Fe_2O_3$ based sensors which were doped with metal oxide catalysts($MoO_3$, $V_2O_5$, $TiO_2$, and CdO) were fabricated by screen printing method. To improve electrical stability of sensors, the $Fe_2O_3$ sensors were annealed in $N_2$ at $700^{\circ}C$ for 2 hours. The $V_2O_5$ doped $Fe_2O_3$ sensor showed about $80{\sim}90%$ sensitivity at alcohol 1,000 ppm and have good selectivity to hydrocarbon gas and tobacco odors. The fabricated sensor and PIC-chip were employed for portable alarm system.

• Journal of the Korean Society of Radiology
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• v.13 no.6
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• pp.831-840
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• 2019

The X-ray detector by liquid crystal with front light was proposed and verified by a X-ray image. The proposed detector utilizes the visible light instead of the electric signal by transistor. Therefore, it shows low noise and can be fabricated at low cost. The liquid crystal detector uses the orientation change of the liquid crystal molecule by conductivity change of the photoconductive layer. We can get the X-ray image from the transmitted light through the liquid crystal. The X-ray dose was calibrated from the measured transmittance of the visible light after comparison to the reference transmittance curve of the liquid crystal. The amorphous Se was used for photo con ducting layer and parylene was used for the liquid crystal alignment instead of the conventional alignment layer which needs high-temperature process over 200℃. The proposed X-ray detector can decrease the X-ray dose by high sensitivity which was verified by simulation. After the fabrication of the X-ray detector, the X-ray image was obtained as a function of the bias voltage to the liquid crystal. 10 lines/mm resolution was obtained from the line pattern and we will apply it to the 17inch diagonal liquid crystal X-ray detector with 3π retardation.

• Journal of Surface Science and Engineering
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• v.57 no.4
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• pp.317-324
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• 2024

We demonstrate a direct growth of carbon nanotubes (CNTs) on the surface of LiFePO₄ (LFP) powders for use in lithium-ion batteries (LIB). LFP has been widely used as a cathode material due to its low cost and high stability. However, there is a still enough room for development to overcome its low energy density and electrical conductivity. In this study, we fabricated novel structured composites of LFP and CNTs (LFP-CNTs) and characterized the electrochemical properties of LIB. The composites were prepared by direct growth of CNTs on the surface of LFP using a rotary chemical vapor deposition. The growth temperature and rotation speed of the chamber were optimized at 600 ℃ and 5 rpm, respectively. For the LIB cell fabrication, a half-cell was fabricated using polytetrafluoroethylene (PTFE) and carbon black as binder and conductive additives, respectively. The electrochemical properties of LIBs using commercial carbon-coated LFP (LFP/C), LFP with CNTs grown for 10 (LFP/CNTs-10m) and 30 min(LFP/CNTs-30m) are comparatively investigated. For example, after the formation cycle, we obtained 149.3, 160.1, and 175.0 mAh/g for LFP/C, LFP/CNTs-10m, and LFP/CNTs-30m, respectively. In addition, the improved rate performance and 111.9 mAh/g capacity at 2C rate were achieved from the LFP/CNTs-30m sample compared to the LFP/CNTs-10m and LFP/C samples. We believe that the approach using direct growth of CNTs on LFP particles provides straightforward solution to improve the conductivity in the LFP-based electrode by constructing conduction pathways.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.05a
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• pp.105-110
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• 2008

We have proposed a new structure of poly-silicon thin film transistor(TFT) which was fabricated the LDD region using doping oxide with graded spacer by etching shape retio. The devices of n-channel poly-si TFT's hydrogenated by $H_2$ and $HT_2$/plasma processes are fabricated for the devices reliability. We have biased the devices under the gate voltage stress conditions of maximum leakage current. The parametric characteristics caused by gate voltage stress conditions in hydrogenated devices are investigated by measuring /analyzing the drain current, leakage current, threshold voltage($V_{th}$), sub-threshold slope(S) and transconductance($G_m$) values. As a analyzed results of characteristics parameters, the degradation characteristics in hydrogenated n-channel polysilicon TFT's are mainly caused by the enhancement of dangling bonds at the poly-Si/$SiO_2$ interface and the poly-Si Brain boundary due to dissolution of Si-H bonds. The structure of novel proposed poly-Si TFT's are the simplity of the fabrication process steps and the decrease of leakage current by reduced lateral electric field near the drain region.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.7 s.337
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• pp.63-70
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• 2005

We investigated the phase noise of an oscillator with a extremely high-Q resonator used as the resonant element. A TE$_{011}$ mode rutile-loaded resonator with high-temperature superconductive (HTS) $YBa_2Cu_3O_{7-\delta}$(YBCO) films used as the endplates is prepared for this purpose. At 23.5 K, the unloaded Q and the loaded Q are 863000 and 180000, respectively. The phase noise of -104.8 dBc/Hz at 1 KHz offset was observed for the oscillator having a resonator with $Q_{L}$ =180000 at the $TE_{01\delta$ mode resonant frequency of 8.545 GHz at 23.5 K Such oscillators with very low phase noise are expected to be used for building up communication systems capable of efficient use of the frequency band and high-speed data transmission as well as for Doppler radars. Frequency tuning could be realized for the resonator by using a piezoactuator Applicability of the tunable rutile resonator for fabricating tunable oscillators of high performances is discussed.

• Journal of the Microelectronics and Packaging Society
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• v.24 no.4
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• pp.31-37
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• 2017

Recently, there has been substantial interest in flexible and wearable devices whose properties and performances are close to conventional devices on hard substrates. Despite the advancement on flexible devices with organic semiconductors or carbon nanotube films, their performances are limited by the carrier scattering at the molecular to molecular or nanotube-to-nanotube junctions. Here in this study, we demonstrate on the vertical semiconductor crystal array embedded in flexible polymer matrix. Such structures can relieve the strain effectively, thereby accommodating large flexural deformation. To achieve such structure, we first established a low-temperature solution-phase synthesis of single crystalline 3D architectures consisting of epitaxially grown ZnO constituent crystals by position and growth direction controlled growth strategy. The ZnO vertical crystal array was integrated into a piece of polydimethylsiloxane (PDMS) substrate, which was then mechanically detached from the hard substrate to achieve the freestanding ZnO-polymer composite. In addition, the characteristics of transferred ZnO were confirmed by additional structural and photoluminescent measurements. The ZnO vertical crystal array embedded in PDMS was further employed as pressure sensor that exhibited an active response to the external pressure, by piezoelectric effect of ZnO crystal.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.15 no.1
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• pp.16-20
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• 2005

In order to improve electrical conductivity and mechanical properties of 8YSZ SOFC electrolyte material, we used Al₂O₃ as an additive and applied the spark plasma sintering (SPS) method. The sintered bodies were densified above 96 ％ of theoretical density at 1200℃ and possessed microstructures composed of homogeneous grains less than 1 ㎛ in size. The addition of Al₂O₃ improved fracture toughness and bending strength by inhibiting grain growth of 8YSZ and increased total ionic conductivity because grain interior conductivity appeared to remain constant and grain boundary conductivity increased. It was assumed that the dissolution of Al₂O₃ into 8YSZ which was inevitable problem at commercial sintering method was effectively prohibited by the SPS technique with a relatively low sintering temperature and the reaction between Al₂O₃ and SiO₂ present at grain boundary to produce the crystalline Al/sub 2-x/Si/sub l-y/O/sub 5/ phase, resulting in the increase of grain boundary conductivity.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.6 no.6
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• pp.468-472
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• 2005

In order to prevent adhering of molten glass on a mold wall, the wall is swabbed with lubricant oil before forming. However, the swabbing process can be removed from the entire processes of the glass forming if the mold wall is made of a porous sintered material. The purpose of the present study is to manufacture a sintered material(having a sintered density of $85{\~}90\%$)which is the most appropriate into. plane material for a glass mold. For the research, SUS310L-based coarse powder (${\~}150{\mu}m$) and SUS420J2-based fine powder ($40{\~}50{\mu}m$) were used for the compact materials, and effects of compaction pressure and sintering condition(atmosphere, temperature) were investigated. The results obtained were as fellows. (1) By means of solid phase sintering, a desired sintering density could not be achieved in any case when using a 310L-based powder having a large particle size. (2) When sintering green compacts(compaction pressure of $2ton/cm^2$) in a commercial vacuum furnace(at $1300^{\circ}C$ for 2 hours), the sintered compacts had densities of $6.2g/cm^3(79\%)$ for 310L + 0.03$\%$B, $6.6g/cm^3 (86\%)$ for 420J2, $7.3g/cm^3(95\%)$ for 420J2+(0.03)$\%$B, and $7.6g/cm^3(99\%)$ for 420j2+(0.06)$\%$B, respectively. As a result, it is regarded that sintered compacts having a desired porosity may be achieved by vacuum sintering the 420J2-based powder (low pressure compaction) and the 310L+0.03$\%$B-based powder (high pressure compaction).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.50-50
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• 2008

ZnO has been extensively studied for optoelectronic applications such as blue and ultraviolet (UV) light emitters and detectors, because it has a wide band gap (3.37 eV) anda large exciton binding energy of ~60 meV over GaN (~26 meV). However, the fabrication of the light emitting devices using ZnO homojunctions is suffered from the lack of reproducibility of the p-type ZnO with high hall concentration and mobility. Thus, the ZnO-based p-n heterojunction light emitting diode (LED) using p-Si and p-GaN would be expected to exhibit stable device performance compared to the homojunction LED. The n-ZnO/p-GaN heterostructure is a good candidate for ZnO-based heterojunction LEDs because of their similar physical properties and the reproducibleavailability of p-type GaN. Especially, the reduced lattice mismatch (~1.8 %) and similar crystal structure result in the advantage of acquiring high performance LED devices with low defect density. However, the electroluminescence (EL) of the device using n-ZnO/p-GaN heterojunctions shows the blue and greenish emissions, which are attributed to the emission from the p-GaN and deep-level defects. In this work, the n-ZnO:Ga/p-GaN:Mg heterojunction light emitting diodes (LEDs) were fabricated at different growth temperatures and carrier concentrations in the n-type region. The effects of the growth temperature and carrier concentration on the electrical and emission properties were investigated. The I-V and the EL results showed that the device performance of the heterostructure LEDs, such as turn-on voltage and true ultraviolet emission, developed through the insertion of a thin intrinsic layer between n-ZnO:Ga and p-GaN:Mg. This observation was attributed to a lowering of the energy barriers for the supply of electrons and holes into intrinsic ZnO, and recombination in the intrinsic ZnO with the absence of deep level emission.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.1
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• pp.31-39
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• 2014

For mobile application, semiconductor packages are increasingly moving toward high density, miniaturization, lighter and multi-functions. Typical wafer level packages (WLP) is fan-in design, it can not meet high I/O requirement. The fan-out wafer level packages (FOWLPs) with reconfiguration technology have recently emerged as a new WLP technology. In FOWLP, warpage is one of the most critical issues since the thickness of FOWLP is thinner than traditional IC package and warpage of WLP is much larger than the die level package. Warpage affects the throughput and yield of the next manufacturing process as well as wafer handling and fabrication processability. In this study, we investigated the characteristics of warpage and main parameters which affect the warpage deformation of FOWLP using the finite element numerical simulation. In order to minimize the warpage, the characteristics of warpage for various epoxy mold compounds (EMCs) and carrier materials are investigated, and DOE optimization is also performed. In particular, warpage after EMC molding and after carrier detachment process were analyzed respectively. The simulation results indicate that the most influential factor on warpage is CTE of EMC after molding process. EMC material of low CTE and high Tg (glass transition temperature) will reduce the warpage. For carrier material, Alloy42 shows the lowest warpage. Therefore, considering the cost, oxidation and thermal conductivity, Alloy42 or SUS304 is recommend for a carrier material.