• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.341-341
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• 2016

The discovery of light emission in nanostructured silicon has opened up new avenues of research in nano-silicon based devices. One such pathway is the application of silicon quantum dots in advanced photovoltaic and light emitting devices. Recently, there is increasing interest on the silicon quantum dots (c-Si QDs) films embedded in amorphous hydrogenated silicon-nitride dielectric matrix (a-SiNx: H), which are familiar as c-Si/a-SiNx:H QDs thin films. However, due to the limitation of the requirement of a very high deposition temperature along with post annealing and a low growth rate, extensive research are being undertaken to elevate these issues, for the point of view of applications, using plasma assisted deposition methods by using different plasma concepts. This work addresses about rapid growth and single step development of c-Si/a-SiNx:H QDs thin films deposited by RF (13.56 MHz) and ultra-high frequency (UHF ~ 320 MHz) low-pressure plasma processing of a mixture of silane (SiH4) and ammonia (NH3) gases diluted in hydrogen (H2) at a low growth temperature ($230^{\circ}C$). In the films the c-Si QDs of varying size, with an overall crystallinity of 60-80 %, are embedded in an a-SiNx: H matrix. The important result includes the formation of the tunable QD size of ~ 5-20 nm, having a thermodynamically favorable <220> crystallographic orientation, along with distinct signatures of the growth of ${\alpha}$-Si3N4 and ${\beta}$-Si3N4 components. Also, the roles of different plasma characteristics on the film properties are investigated using various plasma diagnostics and film analysis tools.

• Proceedings of the Korea Association of Crystal Growth Conference
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• 1999.06a
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• pp.285-303
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• 1999

Thin films of hydrogenated amorphous silicon carbide compounds (a-SixC1x:H) of different compositions were deposited on Si substrate by RF plasma-enhanced chemical vapor deposition (PECVD). Experiments were carried out using silane(SiH4) and methane(CH4) as the gas precursors at 1 Torr and at low substrate temperature (25$0^{\circ}C$). The gas flow rate was changed with every other parameters (pressure, temperature, RF power) fixed. The substrate was Si(100) wafer and all of the films obtained were amorphous. The bonding structure of a-SixC1x:H films deposited was investigated by X-ray photoelectron spectroscopy (XPS) for the film compositions. In addition, the surface morphology of films was investigated by atomic force microscopy (AFM).

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.272-275
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• 2005

The high stability of a-Si:H TFTs device is studied with different deposited conditions of $SiN_x$ films by PECVD. The process parameters of $N_2$, $NH_3$ gas flow rate, RF power, and pressure s of hydrogenated amorphous silicon nitride are taken into account and analyzed by Taguchi experimental design method. The $NH_3$ gas flow rate and RF power are two major factors on the average threshold voltage and the a-SiNx:H film's structure. The hydrogen contents in $SiN_x$ films were measured by FTIR using the related Si-H/N-H bonds ratio in $a-SiN_x:H$ films. After the 330,000 sec gate bias stress is applied, the threshold voltages ($V_th$) shift less than 10%. This result indicates that the highly stable a-Si:H TFTs device can be fabricated with optimum gate $SiN_x$ insulator.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.10 no.1
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• pp.1-4
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• 2000

Thin films of hydrogenated amorphous silicon carbide compounds ($a-Si_{x}C_{1-x}:H$) of different compositions were deposited on Si substrate by RF plasma-enhanced chemical vapor deposition (PECVD). Experiments were carried out using silane (SiH$_4$) and methane ($CH_4$) as the gas precursors at 1 Torr and at a low substrate temperature ($250^{\circ}C$). The gas flow rate was changed with the other parameters (pressure, temperature, RF power) fixed. The substrate was Si(100) wafer and all of the films obtained were amorphous. The bonding structure of $a-Si_{x}C_{1-x}:H$films deposited was investigated by X-ray photoelectron spectroscopy (XPS) for the film compositions. In addition, the surface morphology of films was investigated by atomic force microscopy (AFM).

• Proceedings of the Korean Vacuum Society Conference
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• 2000.02a
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• Korean Journal of Metals and Materials
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• v.48 no.2
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• pp.133-140
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• 2010

10 nm thick Ni layers were deposited on 200 nm $SiO_2/Si$ substrates using an e-beam evaporator. Then, 60 nm or 20 nm thick ${\alpha}$-Si:H layers were grown at low temperature (<$200^{\circ}C$) by a Catalytic-CVD. NiSi layers were already formed instantaneously during Cat-CVD process regardless of the thickness of the $\alpha$-Si. The resulting changes in sheet resistance, microstructure, phase, chemical composition, and surface roughness with the additional rapid thermal annealing up to $500^{\circ}C$ were examined using a four point probe, HRXRD, FE-SEM, TEM, AES, and SPM, respectively. The sheet resistance of the NiSi layer was 12${\Omega}$/□ regardless of the thickness of the ${\alpha}$-Si and kept stable even after the additional annealing process. The thickness of the NiSi layer was 30 nm with excellent uniformity and the surface roughness was maintained under 2 nm after the annealing. Accordingly, our result implies that the low temperature Cat-CVD process with proposed films stack sequence may have more advantages than the conventional CVD process for nano scale NiSi applications.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2001.11a
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• pp.68-68
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• 2001

Thin films of polycrystalline silicon (poly-Si) is a promising material for use in large-area electronic devices. Especially, the poly-Si can be used in high resolution and integrated active-matrix liquid-crystal displays (AMLCDs) and active matrix organic light-emitting diodes (AMOLEDs) because of its high mobility compared to hydrogenated _amorphous silicon (a-Si:H). A number of techniques have been proposed during the past several years to achieve poly-Si on large-area glass substrate. However, the conventional method for fabrication of poly-Si could not apply for glass instead of wafer or quartz substrate. Because the conventional method, low pressure chemical vapor deposition (LPCVD) has a high deposition temperature ($600^{\circ}C-1000^{\circ}C$) and solid phase crystallization (SPC) has a high annealing temperature ($600^{\circ}C-700^{\circ}C$). And also these are required time-consuming processes, which are too long to prevent the thermal damage of corning glass such as bending and fracture. The deposition of silicon thin films on low-cost foreign substrates has recently become a major objective in the search for processes having energy consumption and reaching a better cost evaluation. Hence, combining inexpensive deposition techniques with the growth of crystalline silicon seems to be a straightforward way of ensuring reduced production costs of large-area electronic devices. We have deposited crystalline poly-Si thin films on soda -lime glass and SiOz glass substrate as deposited by PVD at low substrate temperature using high power, magnetron sputtering method. The epitaxial orientation, microstructual characteristics and surface properties of the films were analyzed by TEM, XRD, and AFM. For the electrical characterization of these films, its properties were obtained from the Hall effect measurement by the Van der Pauw measurement.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.254-255
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• 2012

Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.05c
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• pp.83-87
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• 2002

Plasma enhanced chemical vapor deposited (PECVD) silicon nitride ($SiN_X$) is widely used as a gate dielectric material for the hydrogenated amorphous silicon(a-Si:H) thin film transistors (TFT's). We investigated $SiN_X$ films were deposited PECVD at low temperature ($300^{\circ}C$). The reaction gases were used pure nitrogen and a helium diluted of silane gas(20% $SiH_4$, 80% He). Experimental investigations were carried out with the variation of $N_2/SiH_4$ flow ratios from 3 to 50 and the rf power of 200 W. This article presents the $SiN_X$ gate dielectric studies in terms of deposition rate, hydrogen content, etch rate and C-V, leakage current density characteristics for the gate dielectric layer of thin film transistor applications. Electrical properties were analyzed through high frequency (1MHz) C-V and current-voltage (I-V) measurements. The thickness and the refractive index on the films were measured by ellipsometry and chemical bonds were determined by using an FT-IR equipment.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.144.2-144.2
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• 2016

Diamond-like carbon (DLC) coatings have been widely applied to the mechanical components, cutting tools due to properties of high hardness and wear resistance. Among them, hydrogenated amorphous carbon (a-C:H) coatings are well-known for their low friction properties, stable production of thin and thick film, they were reported to be easily worn away under high temperature. Non-hydrogenated tetrahedral amorphous carbon (ta-C) is an ideal for industrial applicability due to good thermal stability from high $sp^3$-bonding fraction ranging from 70 to 80 %. However, the large compressive stress of ta-C coating limits to apply thick ta-C coating. In this study, the thick ta-C coating was deposited onto Inconel alloy disk by the FCVA technique. The thickness of the ta-C coating was about $3.5{\mu}m$. The tribological behaviors of ta-C coated disks sliding against $Si_3N_4$ balls were examined under elevated temperature divided into 23, 100, 200 and $300^{\circ}C$. The range of temperature was setting up until peel off observed. The experimental results showed that the friction coefficient was decreased from 0.14 to 0.05 with increasing temperature up to $200^{\circ}C$. At $300^{\circ}C$, the friction coefficient was dramatically increased over 5,000 cycles and then delaminated. These phenomenon was summarized two kinds of reasons: (1) Thermal degradation and (2) graphitization of ta-C coating. At first, the reason of thermal degradation was demonstrated by wear rate calculation. The wear rate of ta-C coatings showed an increasing trend with elevated temperature. For investigation of relationship between hardness and graphitization, thick ta-C coatings(2, 3 and $5{\mu}m$) were additionally deposited. As the thickness of ta-C coating was increased, hardness decreased from 58 to 49 GPa, which means that graphitization was accelerated. Therefore, now we are trying to increase $sp^3$ fraction of ta-C coating and control the coating parameters for thermal stability of thick ta-C at high temperatures.