• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.9
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• pp.2105-2112
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• 2010

The noise component of electrocardiogram is not distributed in a certain frequency band. It is expressed in various types of signals by rater's physical and environmental conditions. Particularly, since the baseline wander is occurred by the mixture of the original signal and 0 ~ 2 [Hz] range of the frequency components according to muscle constraction of part attaching to an electrode and respiration rythm, it makes the ECG signal analysis difficult. Several methods have been proposed to eliminate the wandering effectually. However, they have some problems. In some methods, the high processing time is required due to the computational complexity, while in other cases ECG signal morphology can be distorted. This paper suggests a simple and effective algorithm that eliminates baseline wander with low computational complexity and without distorting signal morphology. First, the algorithm detects and segments a baseline wandering interval using slope analysis and curve point detection, second, approximates the wandering in the interval as a sinusoid, and then subtracts the sinusoid from signal. Finally, ecg signals without baseline wander are obtained. In order to evaluate the performance of the algorithm, several ECG signals with baseline wandering in MIT/BIH ECG database 101, 111, 113, 234 record were chosen and applied to the algorithm. It is found that the algorithm removes baseline wanders effectively without significant morphological distortion.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.8
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• pp.2708-2721
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• 2014

Data outsourcing in the cloud (DOC) is a promising solution for data management at the present time, but it could result in the disclosure of outsourced data to unauthorized users. Therefore, protecting the confidentiality of such data has become a very challenging issue. The conventional way to achieve data confidentiality is to encrypt the data via asymmetric or symmetric encryptions before outsourcing. However, this is computationally inefficient because encryption/decryption operations are time-consuming. In recent years, a few DOC schemes based on secret sharing have emerged due to their low computational complexity. However, Dautrich and Ravishankar pointed out that most of them are insecure against certain kinds of collusion attacks. In this paper, we proposed a novel DOC scheme based on Shamir's secret sharing to overcome the security issues of these schemes. Our scheme can allow an authorized data user to recover all data files in a specified subset at once rather than one file at a time as required by other schemes that are based on secret sharing. Our thorough analyses showed that our proposed scheme is secure and that its performance is satisfactory.

• Journal of the Semiconductor & Display Technology
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• v.20 no.3
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• pp.71-76
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• 2021

Digital decimation filters are used in various digital signal processing systems using ADCs, including digital communication systems and sensor network systems. When the sampling rate of digital data is reduced, aliasing occurs. So, an anti-aliasing filter is necessary to suppress aliasing before down-sampling the data. Since the anti-aliasing filter has to have a sharp transition band between the passband and the stopband, the order of the filter is very high. However, as the order of the filter increases, the complexity and area of the filter increase, and more power is consumed. Therefore, in this paper, we propose two types of decimation filters, focusing on reducing the area of the hardware. In both cases, the complexity of the circuit is reduced by applying the required down-sampling rate in two times instead of at once. In addition, CIC decimation filters without a multiplier are used as the decimation filter of the first stage. The second stage is implemented using a CIC filter and a down sampler with an anti-aliasing filter, respectively. It is designed with Verilog-HDL and its function and implementation are validated using ModelSim and Quartus, respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.9
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• pp.144-155
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• 2013

This paper presents a low-cost remote power-quality-failure monitoring system (RPMS) using Android App and TI MCU (micro-controller unit), which is appliable to a micro-grid. The designed RPMS testbed consists of smart nodes, a server, and Android APPs. Especially, the C2000-series MCU-based RPMS smart node that is low-cost compared to existing monitoring systems has both a signal processing function for power signal processing and a data transmission function for power-quality monitoring data transmission. The signal processing function implements both a wavelet-based power failure detection algorithm including sag, swell, and interruption, and a FFT-based power failure detection algorithm including harmonics such that reliable and real-time power quality monitoring is guaranteed. The data transmission function implements a low-complexity RPMS transmission protocol and defines a simple data format (msg_Diag) for power monitoring message transmission. We may watch the monitoring data in real time both at a server and Android phone Apps connected to the WiFi network (or WAN). We use RS-232 (or Bluetooth) as the wired (or wireless) communication media between a server and nodes. We program the RPMS power-quality-failure monitoring algorithm using C language in the CCS (Code Composer Studio) 3.3 environment.

• Journal of Information Processing Systems
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• v.19 no.4
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• pp.417-426
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• 2023

To improve the effect of image restoration and solve the image detail loss, an image dehazing enhancement algorithm based on mean guided filtering is proposed. The superpixel calculation method is used to pre-segment the original foggy image to obtain different sub-regions. The Ncut algorithm is used to segment the original image, and it outputs the segmented image until there is no more region merging in the image. By means of the mean-guided filtering method, the minimum value is selected as the value of the current pixel point in the local small block of the dark image, and the dark primary color image is obtained, and its transmittance is calculated to obtain the image edge detection result. According to the prior law of dark channel, a classic image dehazing enhancement model is established, and the model is combined with a median filter with low computational complexity to denoise the image in real time and maintain the jump of the mutation area to achieve image dehazing enhancement. The experimental results show that the image dehazing and enhancement effect of the proposed algorithm has obvious advantages, can retain a large amount of image detail information, and the values of information entropy, peak signal-to-noise ratio, and structural similarity are high. The research innovatively combines a variety of methods to achieve image dehazing and improve the quality effect. Through segmentation, filtering, denoising and other operations, the image quality is effectively improved, which provides an important reference for the improvement of image processing technology.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.2
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• pp.141-146
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• 2017

In this paper, a gradient magnitude hardware architecture based on hardware folding design method is proposed for low power image feature extraction. For the hardware complexity reduction, the projection vector chracteristic of gradient magnitude is applied. The proposed hardware architecture can be implemented with the small degradation of the gradient magnitude data quality. The FPGA implementation result shows the 41% of logic elements and 62% embedded multiplier savings compared with previous work using Altera Cyclone VI (EP4CE115F29C7N) FPGA and Quartus II v16.0 environment.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.5
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• pp.103-111
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• 2007

In this paper, we propose a VLSI architecture of hardware optimized high quality image signal processor for a Single-chip CMOS Image Sensor(CIS). The Single-chip CIS is usually used for mobile applications, so it has to be implemented as small as possible while maintaining the image quality. Several image processing algorithms are used in ISP to improve captured image quality. Among the several image processing blocks, demosaicing and image filter are the core blocks in ISP. These blocks need line memories, but the number of line memories is limited in a low cost Single-chip CIS. In our design, high quality edge-adaptive and cross channel correlation considered demosaicing algorithm is adopted. To minimize the number of required line memories for image filter, we share the line memories using the characteristics of demosaicing algorithm which consider the cross correlation. Based on the proposed method, we can achieve both high quality and low hardware complexity with a small number of line memories. The proposed method was implemented and verified successfully using verilog HDL and FPGA. It was synthesized to gate-level circuits using 0.25um CMOS standard cell library. The total logic gate count is 37K, and seven and half line memories are used.

• Journal of Communications and Networks
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• v.18 no.2
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• pp.150-161
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• 2016

Coordinated multi-point transmission (CoMP) techniques are being touted as enabling technologies for interference mitigation in next generation heterogeneous wireless networks (HetNets). In this paper, we present a comparative performance study of uplink (UL) CoMP algorithms for the 3GPP LTE HetNets. Focusing on a distributed and functionally-split architecture, we consider six distinct UL-CoMP algorithms: 1. Joint reception in the frequency-domain (JRFD) 2. Two-stage equalization (TSEQ) 3. Log-likelihood ratio exchange (LLR-E) 4. Symmetric TSEQ (S-TSEQ) 5. Transport block selection diversity (TBSD) 6. Coordinated scheduling with adaptive interference mitigation (CS-AIM) where JRFD, TSEQ, S-TSEQ, TBSD and CS-AIM are our main contributions in this paper, and quantify their relative performances via the post-processing signal-to-interference-plus-noise ratio distributions.We also compare the CoMP-specific front-haul rate requirements for all the schemes considered in this paper. Our results indicate that, with a linear minimum mean-square error receiver, the JRFD and TSEQ have identical performances, whereas S-TSEQ relaxes the front-haul latency requirements while approaching the performance of TSEQ. Furthermore, in a HetNet environment, we find that CS-AIM provides an attractive alternative to TBSD and LLR-E with a significantly reduced CoMP-specific front-haul rate requirement.

• Journal of Information Processing Systems
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• v.13 no.5
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• pp.1168-1182
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• 2017

In the past decades, various image regularization methods have been introduced. Among them, total variation model has drawn much attention for the reason of its low computational complexity and well-understood mathematical behavior. However, regularization parameter estimation of total variation model is still an open problem. To deal with this problem, a novel adaptive regularization parameter selection scheme is proposed in this paper, by means of using the local spectral response, which has the capability of locally selecting the regularization parameters in a content-aware way and therefore adaptively adjusting the weights between the two terms of the total variation model. Experiment results on simulated and real noisy image show the good performance of our proposed method, in visual improvement and peak signal to noise ratio value.

• Journal of Information Processing Systems
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• v.15 no.3
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• pp.670-681
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• 2019

Orthogonal frequency division multiplexing (OFDM) is a system which is used to encode data using multiple carriers instead of the traditional single carrier system. This method improves the spectral efficiency (optimum use of bandwidth). It also lessens the effect of fading and intersymbol interference (ISI). In 1995, digital audio broadcast (DAB) adopted OFDM as the first standard using OFDM. Later in 1997, it was adopted for digital video broadcast (DVB). Currently, it has been adopted for WiMAX and LTE standards. In this project, a Verilog design is employed to implement an OFDM transmitter (DAC block) and receiver (FFT and ADC block). Generally, OFDM uses FFT and IFFT for modulation and demodulation. In this paper, 16-point FFT decimation-in-frequency (DIF) with the radix-2 algorithm and direct summation method have been analyzed. ADC and DAC in OFDM are used for conversion of the signal from analog to digital or vice-versa has also been analyzed. All the designs are simulated using Verilog on ModelSim simulator. The result generated from the FFT block after Verilog simulation has also been verified with MATLAB.