• Proceedings of the IEEK Conference
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• 1998.06a
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• pp.514-517
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• 1998

This paper proposed a symmetric feedback current enhancement circuit with 1.5V power supply to design a 3$^{rd}$ order butterworth low pass filter. The proposed filter designed on 0.8.mu.m CMOS n-well double poly/double metal process simulated in HSPICE composed of the 3dB frequency enhancement circuit and the unity-gain frequency enhancement circuit. The simulation result on the design filter shows the badnwith of 25MHz, phase of 92.6 .deg. and power consumption of 0.3mW..

• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.87-90
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• 2002

This paper describes design technique of switched-capacitor 1V delta-sigma modulator. To solve the incomplete switching operation at low voltage, bootstrapping technique is used. For PMOS input pair of 1V operational amplifier, simple common mode level down technique is used. Designed 2nd order single loop modulator has an oversampling ratio of 64 and obtains a peak SNR of 71dB, a dynamic range of 73 dB with the power consumption of 350uW at 1V power supply.

• Proceedings of the KIEE Conference
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• 1993.07a
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• pp.265-267
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• 1993

A control for Steam Generator (S/C) level is very difficult by automatic control mode but also manual control node during plant start up and/or low power level operation with the analog control system because of a non-nominal process responce. The goal of this study is to improve and computerize and applicate for KO-RI #1 Steam Generator level control system.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.24 no.6 s.177
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• pp.1371-1378
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• 2000

To reduce backpressure for improving engine power in exhaust system, a large difference of pressure is required, but this is in conflict with the requirement for reducing exhaust noise that needs a small pressure difference. In this paper, the controllable muffler designed by simplifying the structure of the exhaust system has a low backpressure and a proper sound specification to the rotation of engine. The exhaust system in conventional studies has been designed to have maximum noise reduction over the whole driving domain, but due to its complex structure this led to increased backpressure. If the muffler is designed according to the driving frequency, which is a dominant noise component in stationary driving speed, the backpressure is reduced due to the simplified structure of the muffler. Furthermore, a multi-mode muffler able to change structure with varied driving speed was designed.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.55 no.1
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• pp.35-40
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• 2006

Heat-pump system has a special feature that provides heating operation in winter season and cooling operation in summer season with a single system. It also has a merit that absorbs and makes use of wastewater heat, terrestrial heat, and heat energy from the air. Because heat-pump system uses midnight electric power, it decreases power peak load and is very economical as a result. By using the property that energy source is converted to low temperature when losing the heat, high temperature energy source is used to provide heating water and low temperature energy source is used to provide cooling water simultaneously in summer season. This study made up a heat-pump system with 4 air heat sources and a water heat source and implemented the optimal operation algorithm that works with numbers of heat pumps to operate them efficiently. With the heat-pump system, we applied it to cooling and heating operation in summer season operation mode in a real building.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.10
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• pp.1708-1712
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• 2008

This paper describes a linear matrix inequality (LMI) approach to the design of robust low-order power system stabilizers (PSSs), which are used to damp out local-mode oscillations of synchronous generators. The performance of a PSS is expressed as the location of the closed-loop poles, and a single fixed-gain pole-placement controller is synthesized for a wide range of operating conditions. The synthesis results in simultaneous regional pole-placement stabilization. and is formulated as an LMI feasibility problem with a rank condition. A penalty method is applied to solve the rank-constrained LMI problem. Numerical experiments with a single-machine connected to an infinite bus system were performed to demonstrate the proposed method.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.337-339
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• 2008

Recently, Note PCs have being widely used due to their features such as good mobility and low power consumption. In order to ensure the current market position, further improvement is required. Especially, the lower operating voltage is essential for the long operating time of Note PCs. For the achievement of lower operating voltage, possible contributions from LC materials side are to lower the viscosity and to increase the dielectric constant without sacrificing the reliability. In order to achieve lower driving voltage, new LC mixtures have been developed, optimizing theirs physical properties.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.125-128
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• 2001

In this paper, we propose a low power Scan-based Built-ln Self Test based on circuit partitioning and pattern suppression using modified test control unit. To partition a CUT(Circuit Under Testing), the MHPA(Multilevel Hypergraph Partition Algorithm) is used. As a result of circuit partition, we can reduce the total length of test pattern, so that power consumptions are decreased in test mode. Also, proposed Scan-based BIST architecture suppresses a redundant test pattern by inserting an additional decoder in BIST control unit. A decoder detects test pattern with high fault coverage, and applies it to partitioned circuits. Experimental result on the ISCAS benchmark circuits shows the efficiency of proposed low power BIST architecture.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.51 no.1
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• pp.10-17
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• 2002

Due to the development of information communication field, the interest of the SMPS(Switched Mode Power Supply) is increased. The size and weight of SMPS are decided by inductor, capacitor and transformer. Thus, the low loss converter which is operated in high speed switching is required. The resonant FB DC-DC converter is able to operate in high speed switching and apply to high power field because the switching loss is low. In this thesis, it is proposed to control strategy for constant output power of resonant FB DC-DC converter in variable input voltage. The proposed control system is a digital I-PD type control and apply to phase-shift resonant type controller. The output voltage tracks reference without steady state error in variable input voltage. The validity of proposed control strategy is verified from results of simulation and experiment.

• Journal of Electrical Engineering and Technology
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• v.4 no.4
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• pp.559-565
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• 2009

Power dissipation during scan testing is becoming an important concern as design sizes and gate densities increase. The high switching activity of combinational circuits is an unnecessary operation in scan shift mode. In this paper, we present a novel architecture to reduce test power dissipation in combinational logic by blocking signal transitions at the logic inputs during scan shifting. We propose a unique architecture that uses dmuxed scan flip-flop (DSF) and transmission gate as an alternative to muxed scan flip-flop. The proposed method does not have problems with auto test pattern generation (ATPG) techniques such as test application time and computational complexity. Moreover, our elegant method improves performance degradation and large overhead in terms of area with blocking logic techniques. Experimental results on ITC99 benchmarks show that the proposed architecture can achieve an average improvement of 30.31% in switching activity compared to conventional scan methods. Additionally, the results of simulation with DSF indicate that the powerdelay product (PDP) and area overhead are improved by 28.9% and 15.6%, respectively, compared to existing blocking logic method.