• Title/Summary/Keyword: low power mode

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Design of Low Power Current Memory Circuit based on Voltage Scaling (Voltage Scaling 기반의 저전력 전류메모리 회로 설계)

  • Yeo, Sung-Dae;Kim, Jong-Un;Cho, Tae-Il;Cho, Seung-Il;Kim, Seong-Kweon
    • The Journal of the Korea institute of electronic communication sciences
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    • v.11 no.2
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    • pp.159-164
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    • 2016
  • A wireless communication system is required to be implemented with the low power circuits because it uses a battery having a limited energy. Therefore, the current mode circuit has been studied because it consumes constant power regardless of the frequency change. However, the clock-feedthrough problem is happened by leak of stored energy in memory operation. In this paper, we suggest the current memory circuit to minimize the clock-feedthrough problem and introduce a technique for ultra low power operation by inducing dynamic voltage scaling. The current memory circuit was designed with BSIM3 model of $0.35{\mu}m$ process and was operated in the near-threshold region. From the simulation result, the clock-feedthrough could be minimized when designing the memory MOS Width of $2{\mu}m$, the switch MOS Width of $0.3{\mu}m$ and dummy MOS Width of $13{\mu}m$ in 1MHz switching operation. The power consumption was calculated with $3.7{\mu}W$ at the supply voltage of 1.2 V, near-threshold voltage.

Design of an Asynchronous eFuse One-Time Programmable Memory IP of 1 Kilo Bits Based on a Logic Process (Logic 공정 기반의 비동기식 1Kb eFuse OTP 메모리 IP 설계)

  • Lee, Jae-Hyung;Kang, Min-Cheol;Jin, Liyan;Jang, Ji-Hye;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.7
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    • pp.1371-1378
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    • 2009
  • We propose a low-power eFuse one-time programmable (OTP) memory cell based on a logic process. The eFuse OTP memory cell uses separate transistors optimized at program and read mode, and reduces an operation current at read mode by reducing parasitic capacitances existing at both WL and BL. Asynchronous interface, separate I/O, BL SA circuit of digital sensing method are used for a low-power and small-area eFuse OTP memory IP. It is shown by a computer simulation that operation currents at a logic power supply voltage of VDD and at I/O interface power supply voltage of VIO are 349.5${\mu}$A and 3.3${\mu}$A, respectively. The layout size of the designed eFuse OTP memory IP with Dongbu HiTek's 0.18${\mu}$m generic process is 300 ${\times}$557${\mu}m^2$.

Model Predictive Control of Bidirectional AC-DC Converter for Energy Storage System

  • Akter, Md. Parvez;Mekhilef, Saad;Tan, Nadia Mei Lin;Akagi, Hirofumi
    • Journal of Electrical Engineering and Technology
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    • v.10 no.1
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    • pp.165-175
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    • 2015
  • Energy storage system has been widely applied in power distribution sectors as well as in renewable energy sources to ensure uninterruptible power supply. This paper presents a model predictive algorithm to control a bidirectional AC-DC converter, which is used in an energy storage system for power transferring between the three-phase AC voltage supply and energy storage devices. This model predictive control (MPC) algorithm utilizes the discrete behavior of the converter and predicts the future variables of the system by defining cost functions for all possible switching states. Subsequently, the switching state that corresponds to the minimum cost function is selected for the next sampling period for firing the switches of the AC-DC converter. The proposed model predictive control scheme of the AC-DC converter allows bidirectional power flow with instantaneous mode change capability and fast dynamic response. The performance of the MPC controlled bidirectional AC-DC converter is simulated with MATLAB/Simulink(R) and further verified with 3.0kW experimental prototypes. Both the simulation and experimental results show that, the AC-DC converter is operated with unity power factor, acceptable THD (3.3% during rectifier mode and 3.5% during inverter mode) level of AC current and very low DC voltage ripple. Moreover, an efficiency comparison is performed between the proposed MPC and conventional VOC-based PWM controller of the bidirectional AC-DC converter which ensures the effectiveness of MPC controller.

A Novel Spiral Type MEMS Power Generator with Shear Mode Piezoelectric Thick Film (압전 후막의 전단 변형을 이용한 나선형 MEMS 발전기)

  • Song, Hyun-Cheol;Kim, Sang-Jong;Moon, Hi-Gyu;Kang, Chong-Yun;Yoon, Seok-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.219-219
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    • 2008
  • Energy harvesting from the environment has been of great interest as a standalone power source of wireless sensor nodes for ubiquitous sensor networks (USN). There are several power generating methods such as thermal gradients, solar cell, energy produced by human action, mechanical vibration energy, and so on. Most of all, mechanical vibration is easily accessible and has no limitation of weather and environment of outdoor or indoor. In particular, the piezoelectric energy harvesting from ambient vibration sources has attracted attention because it has a relative high power density comparing with other energy scavenging methods. Through recent advances in low power consumption RF transmitters and sensors, it is possible to adopt a micro-power energy harvesting system realized by MEMS technology for the system-on-chip. However, the MEMS energy harvesting system hassome drawbacks such as a high natural frequency over 300 Hz and a small power generation due to a small dimension. To overcome these limitations, we devised a novel power generator with a spiral spring structure. In this case, the energy harvester has a lower natural frequency under 200 Hz than a normal cantilever structure. Moreover, it has higher an energy conversion efficient because shear mode ($d_{15}$) is much larger than 33 mode ($d_{33}$) and the energy conversion efficiency is proportional to the piezoelectric constant (d). We expect the spiral type MEMS power generator would be a good candidate as a standalone power generator for USN.

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A 2.4-GHz Low-Power Direct-Conversion Transmitter Based on Current-Mode Operation (전류 모드 동작에 기반한 2.4GHz 저전력 직접 변환 송신기)

  • Choi, Joon-Woo;Lee, Hyung-Su;Choi, Chi-Hoon;Park, Sung-Kyung;Nam, Il-Ku
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.12
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    • pp.91-96
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    • 2011
  • In this paper, a low-power direct-conversion transmitter based on current-mode operation, which satisfies the IEEE 802.15.4 standard, is proposed and implemented in a $0.13{\mu}m$ CMOS technology. The proposed transmitter consists of DACs, LPFs, variable gain I/Q up-conversion mixer, a divide-by-two circuit with LO buffer, and a drive amplifier. By combining DAC, LPF, and variable gain I/Q up-conversion mixer with a simple current mirror configuration, the transmitter's power consumption is reduced and its linearity is improved. The drive amplifier is a cascode amplifier with gain controls and the 2.4GHz I/Q differential LO signals are generated by a divide-by-two current-mode-logic (CML) circuit with an external 4.8GHz input signal. The implemented transmitter has 30dB of gain control range, 0dBm of maximum transmit output power, 33dBc of local oscillator leakage, and 40dBc of the transmit third harmonic component. The transmitter dissipates 10.2mW from a 1.2V supply and the die area of the transmitter is $1.76mm{\times}1.26mm$.

An Enhanced LPI Control Mechanism in Energy Efficient Ethernet (에너지 효율적인 이더넷에서 개선된 LPI 제어 메커니즘)

  • Lee, Sung-Keun;Jang, Yong-Jae;Yoo, Nam-Hyun
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.5
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    • pp.983-989
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    • 2012
  • IEEE 802.3az LPI mechanism allows an Ethernet link to reduce power consumption by entering a low-power sleeping mode and letting some components being powered off when there is no data to be transmitted through the link. However, if small amount of packets are being sent periodically, such a mechanism can not obtain energy efficiency due to a high overhead caused by excessive mode transitions. In this paper, we propose an enhanced LPI mechanism which can perform state transition adaptively based on the traffic characteristics on transport layer and network status. This simulation result shows that proposed mechanism improves energy efficiency than LPI mechanism with respect to energy consumption rate for various traffic loads.

Bender-type Multilayer Piezoelectric Devices for Energy Harvesting (미소에너지 하베스팅용 적층 벤더 압전 소자 성능 연구)

  • Jeong, Soon-Jong;Kim, Min-Soo;Kim, In-Sung;Song, Jae-Sung
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.193-193
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    • 2008
  • Wearable and ubiquitous micro systems will be greatly growing and their related devices should be self-powered in order to avoid the replacement of finite power sources, for example, by scavenging energy from the environment. With ever reducing power requirements of both analog and digital circuits, power scavenging approaches are becoming increasingly realistic. One approach is to drive an electromechanical converter from ambient motion or vibration. Vibration-driven generators based on electromagnetic, electrostatic and piezoelectric technologies have been demonstrated. Among various generator types proposed so far, piezoelectric generator possesses considerable potential in micro system. To overcome low mechanical-to-electric energy conversion, the piezoelectric device should activate in resonance mode in response to external vibration. Normally, the external vibration excretes at low frequency ranging 0.1 to 200 Hz, whereas the resonant frequencies of the devices are fixed as constant. Therefore, keeping their resonant mode in varying external vibration can be one of important points in enhancing the conversion efficiency. We investigated the possibility of use of multi-bender type piezoelectric devices. To match the external vibration frequency with the device resonant frequency, the various devices with different resonant frequency were chosen.

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A Parameter Estimation of Time Signal and Analysis of Low Frequency Oscillation in Power Systems (시간영역에서 파라미터 추정과 전력계통의 저주파진동 해석)

  • Shim Kwan-Shik;Nam Hae-Kon;Kim Yong-Gu
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.54 no.3
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    • pp.122-132
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    • 2005
  • This paper presents a novel approach based on Prony method to analysis of small signal stability in power system. Prony method is a valuable tool in identifying transfer function and estimating the modal parameter of power system oscillation from measured or computed discrete time signal. This paper define the relative residue of time signal and propose the condition to select low frequency oscillation in each generator. This paper describes the application results of proposed algorithm with respect to KEPCO systems. Simulation results show that the proposed algorithm can be used as another tools of power systems analysis.

A Low-Power CMOS Current Reference Circuit (저전력 CMOS 기준전류 발생회로)

  • 김유환;권덕기;이종렬;유종근
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.89-92
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    • 2001
  • In this paper, a simple low-power CMOS current reference circuit is proposed. The reference circuit includes parasitic pnp BJTs and resistors. Temperature compensation is made by adding a current component proportional to a thermal voltage to a current component proportional to a base-to-emitter voltage. The designed circuit has been simulated using a 0.25${\mu}{\textrm}{m}$ n-well CMOS process parameters. The simulation results show that the reference current is 34.96$mutextrm{A}$$\pm$0.04$mutextrm{A}$ in the temperature range of -2$0^{\circ}C$ to 12$0^{\circ}C$ The reference current varies less than 0.6% when the power supply voltage changes from 2.5V to 3.5V For $V_{DD=5V}$ and T=3$0^{\circ}C$ the power consumption is 520㎼ during normal operation but reduces to 0.l㎻ during power-down mode.

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Low Power SoC Modem Design for High-Speed Wireless Communications (초고속 무선 통신을 위한 저전력 모뎀 SoC 설계)

  • Kim, Yong-Sung;Lim, Yong-Seok;Hong, Dae-Ki
    • Journal of the Semiconductor & Display Technology
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    • v.9 no.2
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    • pp.7-10
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    • 2010
  • In this paper, we design a modem SoC (System on Chip) for low power consumption and high speed wireless communications. Among various schemes of high speed communications, an MB-OFDM (Multi Band-Orthogonal Frequency Division Multiplexing) UWB (Ultra-Wide-Band) chip is designed. The MB-OFDM uses wide-band frequency to provide high speed data rate. Additionally, the system imposes no interference to other services. The 90nm CMOS (Complementary Metal-Oxide Semiconductor) technology is used for the SoC design. Especially, power management mode is implemented to reduce the power consumption.