• ETRI Journal
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• v.33 no.3
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• pp.366-373
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• 2011

In this paper, we propose a low-power all-digital phase-locked loop (ADPLL) with a wide input range and a high resolution time-to-digital converter (TDC). The resolution of the proposed TDC is improved by using a phase-interpolator and the time amplifier. The phase noise of the proposed ADPLL is improved by using a fine resolution digitally controlled oscillator (DCO) with an active inductor. In order to control the frequency of the DCO, the transconductance of the active inductor is tuned digitally. The die area of the ADPLL is 0.8 $mm^2$ using 0.13 ${\mu}m$ CMOS technology. The frequency resolution of the TDC is 1 ps. The DCO tuning range is 58% at 2.4 GHz and the effective DCO frequency resolution is 0.14 kHz. The phase noise of the ADPLL output at 2.4 GHz is -120.5 dBc/Hz with a 1 MHz offset. The total power consumption of the ADPLL is 12 mW from a 1.2 V supply voltage.

• Proceedings of the KIEE Conference
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• 2005.07b
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• pp.1383-1386
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• 2005

Non-isolated OSAKA Converter, which removes a three-phase transformer, is described in this paper. The converter switches once in every half cycle of an AC commercial power source. Therefore, it can solve many problems caused by the high frequency operation. The proposed converter achieves the soft-switching operation and the EMI noise can be reduced. In this circuit, the resonant capacitor, which is used for the soft-switching operation, is utilized for the improvement of an input current waveform. To achieve low cost and compact structure, non-isolated OSAKA converter removes a three-phase transformer of the OSAKA converter. By removing the three-phase transformer, three phase currents occur the interferences each other. To avoid the interference, a new switching method for non-isolated OSAKA converter is preposed. The converter can be constructed by the low-speed large power devices. The converter generates the low distorted input current waveforms with high power factor.

• Journal of electromagnetic engineering and science
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• v.9 no.1
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• pp.25-31
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• 2009

This paper describes CMOS VCO circuit design procedures and techniques for multi-band/multi-standard RF transceivers. The proposed techniques enable a 4 GHz CMOS VCO to satisfy all requirements for Quad-band GSMIEDGE and WCDMA standards by achieving a good trade-off among important specifications, phase noise, power consumption, modulation performance, and chip area efficiency. To meet the very stringent GSM T/Rx phase noise and wide frequency range specifications, the VCO utilizes bond-wire inductors with high-quality factor, an 8-bit coarse tune capbank for low VCO gain(30$\sim$50 MHz/V) and an on-chip $2^{nd}$ harmonic noise filter. The proposed VCO is implemented in $0.13{\mu}m$ CMOS technology. The measured tuning range is about 34 %(3.17 to 4.49 GHz). The VCO exhibits a phase noise of -123 dBc/Hz at 400 kHz offset and -145 dBc/Hz at 3 MHz offset from a 900 MHz carrier after LO chain. The calculated figure of merit(FOM) is -183.5 dBc/Hz at 3 MHz offset. This fully integrated VCO occupies $0.45{\times}0.9\;mm^2$.

• Journal of Institute of Control, Robotics and Systems
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• v.22 no.6
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• pp.483-489
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• 2016

This paper proposes a repeat-back jamming signal detection scheme that utilizes a combined pseudo random noise signal that is effective for processing a global positioning system (GPS) repeat-back jamming signal with the early minus late phase scheme to alleviate any existing multipath signal detection. The proposed scheme uses the combined pseudo random noise signal to treat repeat-back jamming signals like similar multipath signals and can effectively detect a repeat-back jamming signal by applying the early minus late phase scheme to a combined pseudo random noise signal. Through a Monte-Carlo simulation, the detection probability of the proposed scheme is better than the one of the conventional scheme under low jamming to signal power ratio.

• The Journal of the Korea institute of electronic communication sciences
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• v.3 no.2
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• pp.93-100
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• 2008

In this paper, Low Noise Block down converter(LNB) is designed for a Ka-band satellite television receiver only(TVRO) using commercially available MMIC. Designed Low Noise Block down-converter is composed of three stage amplifiers involving input noise matched at first amplification stage, image reject band pass filter, frequency mixer and intermediate frequency amplification. Through LNB Module power budget to obtain gain and attenuation, Optimum LNB devices satisfying Ka-band LNB technical specification are selected. Experimental results of designed Ka-band LNB yields conversion gain of over $58{\pm}1dB$, noise figure of less than 1.5dB and phase noise of -94.6dBc @10KHz.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.4
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• pp.426-432
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• 2012

A fully-integrated low power K-band radar transceiver in 130 nm CMOS process is presented. It consists of a low-noise amplifier (LNA), a down-conversion mixer, a power amplifier (PA), and a frequency synthesizer with injection locked buffer for driving mixer and PA. The receiver front-end provides a conversion gain of 19 dB. The LNA achieves a power gain of 15 dB and noise figure of 5.4 dB, and the PA has an output power of 9 dBm. The phase noise of VCO is -90 dBc/Hz at 1-MHz offset. The total dc power dissipation of the transceiver is 142 mW and the size of the chip is only $1.2{\times}1.4mm^2$.

• 한국신재생에너지학회:학술대회논문집
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• 2005.06a
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• pp.181-184
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• 2005

Operating conditions of photovoltaic power generator is very sensitive to the PV modules. The PV module's control is an importance issue in the removing DC ripple noise. In this paper, the phase-shifted-carrier technique, which is a new three-step dc-dc power multi-converter schemes, is applied to solar generator system to improve the output current waveform. The novel type of three-step dc-dc converter presented has many features such as the good output waveform, high efficiency, low switching losses, low acoustic noise. The circuit configuration is constructed by the conventional full-bridge type converter circuit using the isolated DC power supply for which the solar cell is very suitable. In the end, a circuit design for understanding three-step dc-dc converter and new solar power system were presented

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.9
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• pp.1010-1019
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• 2008

In this paper, we present a noise analysis and measurement results of a bio-radar system that can detect human heartbeat and respiration signals. The noise analysis including various phase noise effects is very important in designing the bio-radar system, since the frequency difference between the received signal and local oscillator is very small and the received power is very low. All of the noise components in a bio-radar system are considered from the point of view of SNR. From this analysis, it can be concluded that the phase noise due to antenna leakage is a dominant factor and is a function of range correlation. Therefore, the phase noise component with range correlation effect, which is the most important noise contribution, is measured using the measurement setup and compared with the calculated results. From the measurement results, our measurement setup can measure a closed-in phase noise of a free-running oscillator. Based on these results, it is possible to design a 2.4 GHz bio-radar system quantitatively which has a detection range of 50 cm and low power of 1 mW without additional PLL circuits.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.12 s.91
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• pp.1184-1189
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• 2004

A new schematic of quadrature voltage controlled oscillator(QVCO) is designed and fabricated. To obtain quadrature characteristic and low phase noise simultaneously, two differential VCOs are forced to un in quadrature mode by using coupling amplifier with a source degeneration resistor, which is optimized to obtain quadrature accuracy with minimum phase noise degradation. The designed QVCO was fabricated in standard CMOS technology. The measured performance showed the phase noise of below -120 dBc/Hz at 1 MHEz frequency offset, tuning bandwidth of 210 MHz from 2.34 GHz to 2.55 GHz with a tuning voltage varying form 0 to 1.8 V Quadrature error of 0.5 degree and amplitude error of 0.2 dB was measured with conjunction with low-lF mixer. The fabricated QVCO requires 19 mA including 5 mA in the VCO core part fiom a 1.8 V supply.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.6
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• pp.552-559
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• 2002

The EM(Engineering Model) LO(Local Oscillator) is designed for Ka-band satellite transponder. The VCO(Voltage Controlled Oscillator) is implemented using a high impedance inverter coupled with dielectric resonator to improve the phase noise performance out of the loop bandwidth. The phase of VCO is locked to that of a stable OCXO(Oven Controlled Crystal Oscillator) by using a SPD(Sampling Phase detector) to improve phase noise performance in the loop bandwidth. This LO exhibits the harmonic rejection characteristics above 43.83 dBc and requires 15 V and 160 mA. The phase noise characteristics are performed as -102.5 dBc/Hz at 10 KHz offset frequency and -104.0 dBc/Hz at 100 KHz offset frequency, respectively, with the output power of 13.50 dBm$\pm$0.33 dB over the temperature range of -20~+7$0^{\circ}C$.