• Title/Summary/Keyword: low noise phase

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A Low Close-in Phase Noise 2.4 GHz RF Hybrid Oscillator using a Frequency Multiplier

  • Moon, Hyunwon
    • Journal of Korea Society of Industrial Information Systems
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    • v.20 no.1
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    • pp.49-55
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    • 2015
  • This paper proposes a 2.4 GHz RF oscillator with a very low close-in phase noise performance. This is composed of a low frequency crystal oscillator and three frequency multipliers such as two doubler (X2) and one tripler (X3). The proposed oscillator is implemented as a hybrid type circuit design using a discrete silicon bipolar transistor. The measurement results of the proposed oscillator structure show -115 dBc/Hz close-in phase noise at 10 kHz offset frequency, while only dissipating 5 mW from a 1-V supply. Its close-in phase noise level is very close to that of a low frequency crystal oscillator with little degradation of noise performance. The proposed structure which is consisted of a low frequency crystal oscillator and a frequency multiplier provides new method to implement a low power low close-in phase noise RF local oscillator.

Low Phase Noise CMOS VCO with Hybrid Inductor

  • Ryu, Seonghan
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.3
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    • pp.158-162
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    • 2015
  • A low phase noise CMOS voltage controlled oscillator(VCO) for multi-band/multi-standard RF Transceivers is presented. For both wide tunability and low phase noise characteristics, Hybrid inductor which uses both bondwire inductor and planar spiral inductor in the same area, is proposed. This approach reduces inductance variation and presents high quality factor without custom-designed single-turn inductor occupying large area, which improves phase noise and tuning range characteristics without additional area loss. An LC VCO is designed in a 0.13um CMOS technology to demonstrate the hybrid inductor concept. The measured phase noise is -121dBc/Hz at 400KHz offset and -142dBc/Hz at 3MHz offset from a 900MHz carrier frequency after divider. The tuning range of about 28%(3.15 to 4.18GHz) is measured. The VCO consumes 7.5mA from 1.3V supply and meets the requirements for GSM/EDGE and WCDMA standard.

A Study on Low Phase Noise Frequency Synthesizer Design with Compact Size for High Frequency Band (고주파용 소형 저 위상잡음 주파수 합성기 설계에 관한 연구)

  • Kim, Tae-Young
    • Journal of the Korea Institute of Military Science and Technology
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    • v.15 no.4
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    • pp.450-457
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    • 2012
  • In this paper, we designed low phase noise frequency synthesizer with compact size for High frequency band (Ku-band). The paper addresses merits and demerits of single loop and dual loop frequency synthesizer. The phase noise characteristics of the phase-locked loop frequency synthesizer were predicted based on the analysis for phase noise contribution of noise sources. The proposed model in this paper more accurately predicts the low phase noise frequency synthesizer with compact size for high frequency band.

Design of the Ku-band Phase Locked Oscillator for high power and low phase noise. (고출력, 저위상잡음 Ku-대역 위상동기발진기설계)

  • 민상보;이영철
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.8
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    • pp.1297-1304
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    • 2002
  • The phase locked oscillator having a low phase noise and high output in Ku-band was designed. To obtain the low phase noise and high output characteristics of oscillator, the nonlinear equivalent circuits of p-HEMT was analyzed by TOM method and we have decided the trade-off bias point between the low phase noise and the output power of oscillator. The designed phase locked oscillator with prescaler for stable operation, experiment results exhibits output power of 1003m with phase noise in the phase locked state of -824BC/HB at 10mz offset from 13.250Hz, and simulation result of 1003m output power in the phase noise -840Bc/Hz at 10KHz offset frequency respectively. a good agreement has been obtained between simulations and experiments results.

Design of a Low-Power Low-Noise Clock Synthesizer PLL (저전력 저잡음 클록 합성기 PLL 설계)

  • Park, J.K.;Shim, H.C.;Park, J.T.;Yu, C.G.
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.479-481
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    • 2006
  • This paper describes a 2.5V, 320MHz low-noise and low-power Phase Locked Loop(PLL) using a noise-rejected Voltage Controlled ring Oscillator(VCO) fabricated in a TSMC 0.25um CMOS technology. In order to improve the power consumption and oscillation frequency of the PLL, The VCO consist of three-stage fully differential delay cells that can obtain the characteristic of high speed, low power and low phase noise. The VCO operates at 7MHz -670MHz. The oscillator consumes l.58mA from a 320MHz frequency and 2.5V supply. When the PLL with fully-differential ring VCO is locked 320MHz, the jitter and phase noise measured 26ps (rms), 157ps (p-p) and -97.09dB at 100kHz offset. We introduce and analysis the conditions in which ring VCO can oscillate for low-power operation.

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2.4GHZ CMOS LC VCO with Low Phase Noise

  • Qian, Cheng;Kim, Nam-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.501-503
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    • 2008
  • This paper presents the design of a 2.4 GHz low phase noise fully integrated LC Voltage-Controlled-Oscillator (VCO) in $0.18{\mu}m$ CMOS technology. The VCO is without any tail bias current sources for a low phase noise and, in which differential varactors are adopted for the symmetry of the circuit. At the same time, the use of differential varactors pairs reduces the tuning range, i.e., the frequency range versus VTUNE, so that the phase noise becomes lower. The simulation results show the achieved phase noise of -138.5 dBc/Hz at 3 MHz offset, while the VCO core draws 3.9mA of current from a 1.8V supply. The tuning range is from 2.28GHz to 2.55 GHz.

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A Sturdy on WLAN RFIC VCO based on InGaP/GaAs HBT (InGaP/GaAs HBT를 이용한 WLAN 용 Low Noise RFIC VCO)

  • Myoung, Seong-Sik;Park, Jae-Woo;Cheon, Sang-Hoon;Yook, Jong-Gwan
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2003.11a
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    • pp.155-159
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    • 2003
  • This paper presents fully integrated 5 GHz band low phase noise LC tank VCO. The implemented VCO is tuned by integrated PN diode and tuning rage is $5.01{\sim}5.30$ GHz under $0{\sim}3 V$ control voltage. For good phase noise performance, LC filtering technique, common in Si CMOS process, is used, and to prevent degradation of phase noise performance by collector shot-noise and to reduce power dissipation the HBT is biased at low collector current density bias point. The measured phase noise is -87.8 dBc/Hz at 100 kHz offset frequency and -111.4 dBc/Hz at 1 MHz offset frequency which is good performance. Moreover phase noise is improved by roughly 5 dEc by LC filter. It is the first experimental result in InGaP/GaAs HBT process. The figure of merit of the fabricated VCO with LC filter is -172.1 dBc/Hz. It is the best result among 5 GHz InGaP HBT VCOs. Moreover this work shows lower DC power consumption, higher output power and more fixed output power compared with previous 4, 5 GHz band InGaP HBT VCOs.

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Design of Low Phase Noise Frequency Synthesizer for Digital MMDS Downconverter (디지털 MMDS 하향변환기용 저 위상잡음 주파수 합성기의 설계)

  • 김영진
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.2
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    • pp.151-158
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    • 2002
  • In this paper, Phase locked microwave oscillator having the low phase noise and high stability for digital MMDS down converter was designed. we have been analyzed the low phase noise properties by the active device nonlinear equivalent circuits and derived the necessary and sufficient conditions for high stable voltage control oscillator. And it is applied to phase locked loop, we design the phase locked microwave oscillator of frequency synthesizer. Experimental results of designed phase locked oscillator shows -85dBc/Hz @ 10KHz phase noise properties and simulation result is -90Bc/Hz @ 10kHz respectively we shows that proposed low phase noise and stable conditions of phase locked microwave oscillator can be applied to design the high stable digital MMDS frequency synthesizer.

Synchronization of a Silica Microcomb to a Mode-locked Laser with a Fractional Optoelectronic Phase-locked Loop

  • Hui Yang;Changmin Ahn;Igju Jeon;Daewon Suk;Hansuek Lee;Jungwon Kim
    • Current Optics and Photonics
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    • v.7 no.5
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    • pp.557-561
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    • 2023
  • Ultralow-noise soliton pulse generation over a wider Fourier frequency range is highly desirable for many high-precision applications. Here, we realize a low-phase-noise soliton pulse generation by transferring the low phase noise of a mode-locked laser to a silica microcomb. A 21.956-GHz and a 9.9167-GHz Kerr soliton combs are synchronized to a 2-GHz and a 2.5-GHz mode-locked laser through a fractional optoelectronic phase-locked loop, respectively. The phase noise of the microcomb was suppressed by up to ~40 dB at 1-Hz Fourier frequency. This result provides a simple method for low-phase-noise soliton pulse generation, thereby facilitating extensive applications.

Low-Phase Noise Dual-band VCO Using PBG Structure (Photonic Bandgap 구조를 이용한 저 위상잡음 듀얼밴드 VCO에 관한 연구)

  • 조용기;서철헌
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.2
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    • pp.53-58
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    • 2004
  • In this paper, the low-phase dual-band VCO, by adding switching circuit with PIN diode at feedback loop of the oscillation part having negative-resistance, is realized. In order to reduce the phase noise of the VCO, PBG structure applied to the ground plane of the resonator. When applying for PBG structure, output power is -9.17㏈m and phase noise is -102㏈c/Hz at 5.25㎓, output power is -5.17㏈m and phase noise is -101㏈c/Hz at 1.8㎓, respectively.