• 제목/요약/키워드: low noise amplifier

검색결과 542건 처리시간 0.038초

Miniaturized LNB Downconverter MMIC for Ku-band Satellite Communication System using InGaP/GaAs HBT Process

  • Lee, Jei-Young;Lee, Sang-Hun;Lee, Jong-Chul;Kim, Jong-Heon;Lee, Byunje;Park, Chan-Hyeong;Kim, Nam-Young
    • Journal of electromagnetic engineering and science
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    • 제4권1호
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    • pp.37-42
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    • 2004
  • In this paper, LNB(low noise block) downconverter MMIC is designed for Ku-band satellite communication system using InGaP/GaAs HBT high linear process. Designed MMIC consists of low noise amplifier, double balanced mixer, and IF amplifier with a total chip area of 2.6${\times}$1.1 $\textrm{mm}^2$. Designed MMIC has the characteristics of over 37.5 ㏈ conversion gain, 14 ㏈ noise figure, ripple of 3 ㏈, and output-referred $P_{1dB}$TEX>(1 ㏈ compression power) of 2.5 ㏈m with total power dissipation of 3 V, 50 mA.

A Dual-Band CMOS Low-Noise Amplifier

  • 오태현;전희석;정영호;신형철
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2006년도 하계종합학술대회
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    • pp.489-490
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    • 2006
  • This paper presents a switch type 2.4/5.8 GHz dual band low-noise amplifier, designed with $0.13{\mu}m$ RF CMOS technology. Using MOS switch allows the LNA to have two different input transconductance and output capacitance modes. Given supply voltage of 1.2 V, the simulation exhibits gains of 8.1 dB and 17.1 dB, noise figures of 3.1 dB and 2.57 dB and power consumptions of 13.0 mW and 10.2 mW at 2.4 GHz and 5.8 GHz, respectively.

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무선 근거리 통신망용 저잡음 증폭기의 설계 (Design of a Low Noise Amplifier for Wireless LAN)

  • 류지열;노석호;박세현
    • 한국정보통신학회논문지
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    • 제8권6호
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    • pp.1158-1165
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    • 2004
  • 본 논문에서는 802.11a 무선 근거리 통신망 (wireless LAN)에서 사용 가능한 5.25㎓ SiGe 저잡음 증폭기(LNA)를 제안한다. 본 저잡음 증폭기는 2단 구조로 1V의 공급전압에서 동작하며, 0.18$\mu\textrm{m}$ SiGe 공정으로 제작되었다. 이 저잡음 증폭기의 경우 5.25㎓의 동작주파수에서 17㏈의 전압이득, 2.7㏈의 잡음지수, -l5㏈의 반사계수, -5㏈md의 IIP3 및 -14㏈m의 1㏈ compression point와 같은 우수한 동작특성을 보였으며, 바이어스 회로에서 소모되는 0,5㎽를 포함하여 전체회로에서 소모되는 총 전력은 7㎽이다.

Hybrid 형태의 이중 대역 저잡음 증폭기 설계에 관한 연구 (A Study on the Design of Hybrid Dual Band Low Noise Amplifier)

  • 오재욱;김형석
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 제38회 하계학술대회
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    • pp.264-265
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    • 2007
  • In this paper, we deal with a hybrid dual band low noise amplifier with tunable matching circuits for a Radio Frequency Identification(RFID) reader operating at 433MHz and 912MHz. The tunable matching circuit consists of the microstrip line, SMD component and varactor. Simulation results show that the S21 parameter is 17dB and 7.91dB at 433MHz and 912MHz, respectively. The noise figure is also determined to 3.56dB and 5.58dB at the same frequencies with a power consumption of 19.36mW.

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2.4GHz 무선랜용 가변이득 저잡음 증폭기 설계 (Variable gain LNA Design for 2.4GHz Wireless LAN)

  • 강태영;박영호;임지훈;박정호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 I
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    • pp.621-624
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    • 2003
  • In this paper, two Cascode Low Noise Variable Gain Amplifiers are proposed for wide dynamic range and constant Noise Figure for frequency range of 2.4GHz. Designed Variable Gain Low Noise Amplifier are for Wireless Local Area Network (WLAN) applications. A gain is higher than 17dB and the noise figure is approximately 1.3dB and the input VSWR is better than 2:1.

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A New Automatic Compensation Network for System-on-Chip Transceivers

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • ETRI Journal
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    • 제29권3호
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    • pp.371-380
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    • 2007
  • This paper proposes a new automatic compensation network (ACN) for a system-on-chip (SoC) transceiver. We built a 5 GHz low noise amplifier (LNA) with an on-chip ACN using 0.18 ${\mu}m$ SiGe technology. This network is extremely useful for today's radio frequency (RF) integrated circuit devices in a complete RF transceiver environment. The network comprises an RF design-for-testability (DFT) circuit, capacitor mirror banks, and a digital signal processor. The RF DFT circuit consists of a test amplifier and RF peak detectors. The RF DFT circuit helps the network to provide DC output voltages, which makes the compensation network automatic. The proposed technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance, gain, and noise figure using the developed mathematical equations. The ACN automatically adjusts the performance of the 5 GHz LNA with the processor in the SoC transceiver when the LNA goes out of the normal range of operation. The ACN compensates abnormal operation due to unusual thermal variation or unusual process variation. The ACN is simple, inexpensive and suitable for a complete RF transceiver environment.

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An Wideband GaN Low Noise Amplifier in a 3×3 mm2 Quad Flat Non-leaded Package

  • Park, Hyun-Woo;Ham, Sun-Jun;Lai, Ngoc-Duy-Hien;Kim, Nam-Yoon;Kim, Chang-Woo;Yoon, Sang-Woong
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제15권2호
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    • pp.301-306
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    • 2015
  • An ultra-compact and wideband low noise amplifier (LNA) in a quad flat non-leaded (QFN) package is presented. The LNA monolithic microwave integrated circuit (MMIC) is implemented in a $0.25{\mu}m$ GaN IC technology on a Silicon Carbide (SiC) substrate provided by Triquint. A source degeneration inductor and a gate inductor are used to obtain the noise and input matching simultaneously. The resistive feedback and inductor peaking techniques are employed to achieve a wideband characteristic. The LNA chip is mounted in the $3{\times}3-mm^2$ QFN package and measured. The supply voltages for the first and second stages are 14 V and 7 V, respectively, and the total current is 70 mA. The highest gain is 13.5 dB around the mid-band, and -3 dB frequencies are observed at 0.7 and 12 GHz. Input and output return losses ($S_{11}$ and $S_{22}$) of less than -10 dB measure from 1 to 12 GHz; there is an absolute bandwidth of 11 GHz and a fractional bandwidth of 169%. Across the bandwidth, the noise figures (NFs) are between 3 and 5 dB, while the output-referred third-order intercept points (OIP3s) are between 26 and 28 dBm. The overall chip size with all bonding pads is $1.1{\times}0.9mm^2$. To the best of our knowledge, this LNA shows the best figure-of-merit (FoM) compared with other published GaN LNAs with the same gate length.

P-HEMT를 이용한 능동 안테나용 X-Band MMIC 저잡음 증폭기 설계 및 제작 (The Design and Fabrication of X-Band MMIC Low Noise Amplifier for Active antennal using P-HEMT)

  • 강동민;맹성재;김남영;이진희;박병선;윤형섭;박철순;윤경식
    • 한국전자파학회논문지
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    • 제9권4호
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    • pp.506-514
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    • 1998
  • 능동 안테나용 X-band(11.7~12 GHz)단일 칩 초고주파 집적회로(Monolithic Microwave Integrated Circuits, MMICs) 저잡음 증폭기(Low Noise Amplifier, LNA)를 $0.15{\mu}m\times140{\mu}m$ AlGaAs/InGaAs/GaAs 고속 전자 이동도 트랜지스터(Pseudomorphic-High Electron Mobility Transistor, P-HEMT)를 이용하여 2단으로 설계하고 제작하였다. 증폭기의 안정도 특성을 위해 이득이 다소 감소하나 입력정합이 쉽고 안정도가 좋은 소스 인턱터를 사용하여 저잡음증폭기를 설계하였다. 동작 주파수에서 약 17dB의 이득, 1.3 dB의 잡음 지수 그리고 입.출력 반사손실은 -17~-15dB를 측정 결과로서 얻었다. 이러한 측정 결과는 잡음 지수를 제외하고는 설계 결과와 거의 일치하며, 제작된 MMIC LNA의 칩 크기는 $1.43\tiems1.27mm^2$이다.

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이득과 잡음 지수의 동적 제어가 가능한 광대역 저 잡음 증폭기 (A Gain and NF Dynamic Controllable Wideband Low Noise Amplifier)

  • 오태수;김성균;황과지;김병성
    • 한국전자파학회논문지
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    • 제20권9호
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    • pp.900-905
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    • 2009
  • 본 논문에서는 전류 블리딩(bleeding)과 입력 인덕티브 직렬-피킹을 이용한 공통 드레인 귀환(Common Drain Feedback: CDFB) CMOS 광대역 저잡음 증폭기(Low Noise Amplifier: LNA)를 설계하였다. 캐스코드 증폭기와 귀환 증폭기를 DC 결합하여 블리딩 전류의 조정을 통해 LNA의 이득과 잡음 지수(Noise figure: NF)의 동적 제어를 실현하였다. 제작한 LNA는 2.5 GHz의 대역폭에서, 고이득 영역은 $1.7{\sim}2.8\;dB$ NF와 17.5 dB 이득, 그리고 27 mW의 전력 소비를 보이고, 저 이득 영역은 $2.7{\sim}4.0\;dB$ NF와 14 dB 이득, 그리고 1.8 mW의 전력 소비를 보인다.