• ETRI Journal
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• v.27 no.5
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• pp.557-562
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• 2005

Low-density parity-check (LDPC) codes have recently emerged due to their excellent performance. However, the parity check (H) matrices of the previous works are not adequate for hardware implementation of encoders or decoders. This paper proposes a hybrid parity check matrix which is efficient in hardware implementation of both decoders and encoders. The hybrid H-matrices are constructed so that both the semi-random technique and the partly parallel structure can be applied to design encoders and decoders. Using the proposed methods, the implementation of encoders can become practical while keeping the hardware complexity of the partly parallel decoder structures. An encoder and a decoder are designed using Verilog-HDL and are synthesized using a $0.35 {\mu}m$ CMOS standard cell library.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.05a
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• pp.798-801
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• 2010

This paper describes an efficient architecture for LDPC(Low-Density Parity Check) decoder, which supports three block lengths (648, 1,296, 1,944) of IEEE 802.11n standard. To minimize hardware complexity, the min-sum algorithm and block-serial layered structure are adopted in DFU(Decoding Function Unit) which is a main functional block in LDPC decoder. The optimized H-ROM structure for multi block lengths reduces the ROM size by 42% as compared to the conventional method. Also, pipelined memory read/write scheme for inter-layer DFU operations is proposed for an optimized operation of LDPC decoder.

• ETRI Journal
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• v.28 no.2
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• pp.145-154
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• 2006

In the decoding process associated with interframe wavelet coding, the inverse wavelet transform requires high computational complexity. However, as video technology starts to pervade all aspects of our lives, decoders are becoming required in various devices such as PDAs, notebooks, PCs, and set-top boxes. Therefore, a decoder's complexity needs to be adapted to the processor's computational power, and consequently a low-complexity codec is also required for scalable video coding. In this paper, we propose a method of controlling and lowering the complexity of the spatial wavelet transform while sustaining the same coding efficiency as that currently afforded. In addition, the proposed method may alleviate the ringing effect for slowly changing image sequences.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.6
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• pp.418-429
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• 2016

In this paper, we propose a hybrid Wyner-Ziv video coding structure that combines conventional motion predictive video coding and Wyner-Ziv video coding to eliminate the feedback channel, which is a major practical problem in applications using the Wyner-Ziv video coding approach. The proposed method divides a hybrid frame into two regions. One is coded by a motion predictive video coder, and the other by the Wyner-Ziv coding method. The proposed encoder estimates side information with low computational complexity, using the coding information of the motion predictive coded region, and estimates the number of syndrome bits required to decode the region. The decoder generates side information using the same method as the encoder, which also reduces the computational complexity in the decoder. Experimental results show that the proposed method can eliminate the feedback channel without incurring a significant rate-distortion performance loss.

• ETRI Journal
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• v.44 no.1
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• pp.105-116
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• 2022

In this study, a novel group-indexed orthogonal frequency division multiplexing index modulation (OFDM-IM) scheme is proposed to achieve a tradeoff between spectral efficiency (SE) and bit-error-rate (BER) performance. In the proposed scheme, the total subcarriers in a group are divided into subgroups, and additional bits are transmitted by subgroup indexing, unlike the conventional OFDM-IM scheme, which uses index bits to select active subcarriers. With the proposed scheme, the additional degree of freedom provided by the number of active subgroups selected provides a tradeoff between spectral efficiency and BER performance. Decoding is performed in steps to reduce computional complexity in the decoder design. Simulaton results show that the number of active subgroups selected influences the proposed scheme's performance in terms of energy efficiency, spectral efficiency, and BER performance.

• ETRI Journal
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• v.26 no.2
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• pp.122-135
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• 2004

Although frame-based MPEG-4 video services have been successfully deployed since 2000, MPEG-4 video coding is now facing great competition in becoming a dominant player in the market. Object-based coding is one of the key functionalities of MPEG-4 video coding. Real-time object-based video encoding is also important for multimedia broadcasting for the near future. Object-based video services using MPEG-4 have not yet made a successful debut due to several reasons. One of the critical problems is the coding complexity of object-based video coding over frame-based video coding. Since a video object is described with an arbitrary shape, the bitstream contains not only motion and texture data but also shape data. This has introduced additional complexity to the decoder side as well as to the encoder side. In this paper, we have analyzed the current MPEG-4 video encoding tools and proposed efficient coding technologies that reduce the complexity of the encoder. Using the proposed coding schemes, we have obtained a 56 percent reduction in shape-coding complexity over the MPEG-4 video reference software (Microsoft version, 2000 edition).

• 한국ITS학회:학술대회논문집
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• 2008.11a
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• pp.551-558
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• 2008

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.92-100
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• 2009

In this paper, we analyze the hardware architecture of Low Density Parity Check (LDPC) decoder using Log Likelihood Ration-Belief Propagation (LLR-BP) decoding algorithm. Various design issues that affect the decoding performance and the hardware complexity are discussed and the tradeoffs between the hardware complexity and the performance are analyzed. The message data for passing error probability is quantized to 7 bits and among them the fractional part is 4 bits. To maintain the decoding performance, the integer and fractional parts for the intrinsic information is 2 bits and 4 bits respectively. We discuss the alternate implementation of $\Psi$(x) function using piecewise linear approximation. Also, we improve the hardware complexity and the decoding time by applying overlapped scheduling.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.6C
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• pp.865-873
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• 2004

MPEG-2 Advanced Audio Coding(AAC) is widely used in the multi-channel audio compression standards. And it combines hi인-resolution filter bank prediction techniques, and Huffman coding algorithm to achieve the broadcast-quality audio level at very low data rates. The forward and inverse modified discrete transforms which are operated in the encoder and the decoder of the filter bank need many computations. In this paper, we propose suitable recursive structure at IMDCT processing for MPEG-2 AAC real-time decoder. We confirm the memory, the computation speed and complexity of the proposed structure.

• Journal of information and communication convergence engineering
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• v.6 no.2
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• pp.158-163
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• 2008

The MB-OFDM based UWB communication system is a personal area network specification aiming to provide 480Mbps peak data rate over 528 MHz spectrum. As the corresponding baseband modem operates at high clock rate, its complexity should be optimized for low power consumption. A set of modem design parameters is suggested including the AD bit width, the clipping level and the quantization level at the Viterbi decoder input as well as the trace-back depth of the Viterbi decoder. The data throughput is used to evaluate the performance of the receiver and a recommended set of design parameter values is presented to aid efficient modem implementation.