• Journal of Mechanical Science and Technology
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• v.17 no.5
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• pp.654-667
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• 2003

This paper presents a consequence of the systematic approach to identify the aerodynamic parameters of an unmanned aerial vehicle (UAV) equipped with the automatic flight control system. A 3-2-1-1 excitation is applied for the longitudinal mode while a multi-step input is applied for lateral/directional excitation. Optimal time step for excitation is sought to provide the broad input bandwidth. A fully automated programmed flight test method provides high-quality flight data for system identification using the flight control computer with longitudinal and lateral/directional autopilots, which enable the separation of each motion during the flight test. The accuracy of the longitudinal system identification is improved by an additional use of the closed-loop flight test data. A constrained optimization scheme is applied to estimate the aerodynamic coefficients that best describe the time response of the vehicle. An appropriate weighting function is introduced to balance the flight modes. As a result, concurrent system models are obtained for a wide envelope of both longitudinal and lateral/directional flight maneuvers while maintaining the physical meanings of each parameter.

• Journal of Power Electronics
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• v.18 no.3
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• pp.853-862
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• 2018

Frequency coupling in the phase domain is a recently reported phenomenon for phase locked loop (PLL) based three-phase grid-inverter systems. This paper investigates the mechanism and stabilization method for the frequency coupling to the stability of grid-inverter systems. Self and accompanying admittance models are employed to represent the frequency coupling characteristics of the inverter, and a small signal equivalent circuit of a grid-inverter system is set up to reveal the mechanism of the frequency coupling to the system stability. The analysis reveals that the equivalent inverter admittance is changed due to the frequency coupling of the inverter, and the system stability is affected. In the end, retuning the bandwidth of the phase locked loop is presented to stabilize the three-phase grid-inverter system. Experimental results are given to verify the analysis and the stabilization scheme.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.4
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• pp.354-362
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• 1997

In this paper, a microstrip antenna with a small loop consisting of the left and right parallel plate to load a capacitor is proposed. It is obtained the improved high gain and bandwidth than the antenna consisting of the right parallel plate to load a capacitor on QMSA (Quarter-Wavelength Mi- crostrip Antenna). Also, the designed and manufactured antenna can receive both vertically and horizontally polarised waves to operating frequency of 1.5 GHz; therefore this is available as a small antenna for wireless telephones and will be quite useful for indoor communication.

• Transactions of the Society of Information Storage Systems
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• v.7 no.2
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• pp.70-74
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• 2011

The mobile camera module is a device to be inserted in the digital device for camera feature. The mobile camera module is being shaken by vibrations such as handshake during the exposure time. The clarity is compromised by these vibrations, thus the vibration is considered as an external disturbance. Moreover the use of mobile camera module has been being expanded for automotive vibration should be considered. These external disturbances can cause image blurring, thus optical image stabilization should be applied for image compensation. The compensator is fulfilled mechanically by movable lens group or image sensor that adjusts the optical path to the camera movement. Open loop control is useful for well-defined systems like compliant mechanism. Notch filter and lead compensator are designed and applied to improve the stability and bandwidth. The final level of image compensating is confirmed by image processing with MATLAB and CODE V to verify the better performance.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.387-394
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• 2016

This paper presents a fully digital delay locked loop (DLL) that can acquire lock in four clock cycles with a resolution of a 1/4 NAND-delay. The proposed DLL with a multi-dither-free phase detector acquires the initial lock in four clock cycles with 1/2 NAND-delay. Then, it utilizes a multi-dither-free phase detector, a region accumulator, and phase blenders, to improve the resolution to a 1/4 NAND-delay. The region accumulator which continuously steers the control registers and the phase blender, adaptively controls the tracking bandwidth depending on the amount of jitter, and effectively suppresses the dithering jitter. Fabricated in a 65 nm CMOS process, the proposed DLL occupies $0.0432mm^2$, and consumes 3.7 mW from a 1.2-V supply at 2 GHz.

• Proceedings of the IEEK Conference
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• 2007.07a
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• pp.341-342
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• 2007

The IRFPA (InfraRed Focal Plane Array) ROIC (ReadOut Integrated Circuit) was designed in folded-cascode Op-Amp using $0.35{\mu}m$ CMOS technology. As the folded-cascode has high open-loop voltage gain and fast settling time, that used in many analog circuit designs. In this paper, folded-cascode Op-Amp for ROIC of the $32{\times}32$ IRFPA has been designed. HSPICE simulation results are unit gain bandwidth of 13.0MHz, 90.6 dB open loop gain, 8 V/${\mu}m$ slew rate, 600 ns settling time and $66^{\circ}$ phase margin.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.10
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• pp.479-485
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• 2001

In this paper, we introduce a charge pump phase-locked loop (PLL) architecture which employs a precharge phase frequency detector (PFD) and a sequential PFD to achieve a high frequency operation and a fast acquisition. Operation frequency is increased by using the precharge PFD when the phase difference is within $-{\pi}{\sim}{\pi}$ and acquisition time is shortened by using the sequential PFD and the increased charge pump current when the phase difference is larger than ${\pm}{\pi}$. So error detection range of the proposed PLL structure is not limited to $-{\pi}{\sim}{\pi}$ and a high frequency operation and a higher speed lock-up time can be achieved. The proposed PLL was designed using 1.5 ${\mu}m$ CMOS technology with 5V supply voltage to verify the lock in process. The proposed PLL shows successful acquisition for 200 MHz input frequency. On the other hand, the conventional PLL with the sequential PFD cannot operate at up to 160MHz. Moreover, the lock-up time is drastically reduced from 7.0 ${\mu}s\;to\;2.0\;{\mu}s$ only if the loop bandwidth to input frequency ratio is regulated by the divide-by-4 counter during the acquisition process. By virtue of this dual PFDs, the proposed PLL structure can improve the trade-off between acquisition behavior and locked behavior.

• Journal of Power Electronics
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• v.19 no.1
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• pp.254-264
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• 2019

This paper proposes an indirect current control technique based on a proportional resonant (PR) approach for the seamless mode transfer of utility interactive inverters. Direct-current and voltage hybrid control methods have been used for inverter control under grid-connected and islanded modes. A large bandwidth can be selected due to the structure of single-loop control. However, this results in poor dynamic transients due to sudden changes of the controller during mode changes. Therefore, inverter control based on indirect current is proposed to improve the dynamic transients by consistently controlling the output voltage under all of the operation modes. A PR-based indirect current control topology is used in this study to maintain the load voltage quality under all of the modes. The design processes of the PR-based triple loop are analyzed in detail while considering the system stability and dynamic transients. The mode transfer techniques are described in detail for both sudden unintentional islanding and islanded mode voltage quality improvements. In addition, they are described using the proposed indirect control structure. The proposed method is verified by the PSiM simulations and laboratory-scale VDER-HILS experiments.

• Journal of the Korean Magnetics Society
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• v.23 no.2
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• pp.49-53
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• 2013

A current sensor is one of important component which is used for the electrical current measurement during charge and discharge of the battery, and monitoring system of the motor controller in the electric and hybrid vehicle. In this study, we have developed an open loop type current sensor using GaAs Hall sensor and magnetic core has an air gap. The Hall sensor detect magnetic field produced by the current to be measured. The 3 mm air gap core was made by HGO electrical steel sheets after slitting, winding, annealing, molding, and cutting. Developed current sensor shows 0.03 % linearity within DC current range from -400 A to +400 A. Operating temperature range was extended to the range of $-40{\sim}105^{\circ}C$ using temperature compensating electronic circuit. To Improve frequency bandwidth limit due to the air flux of PCB (Printed Circuit Board) and Hall sensor, We employed an air flux compensating loop near Hall sensor or on PCB. Frequency bandwidth of the sensor was 100 kHz when we applied sine wave current of $40A{\cdot}turn$ in the frequency range from 100 Hz to 100 kHz. For the dynamic response time measurement, 5 kHz square wave current of $40A{\cdot}turn$ was applied to the sensor. Response time was calculated time reach to 90 % of saturation value and smaller than $2{\mu}s$.

• Proceedings of the IEEK Conference
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• 2000.07a
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• pp.101-104
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• 2000

Nowadays, the issue of congestion control in high-speed communication networks becomes critical in view of the bandwidth-delay products for efficient data flow. In particular, the fact that the congestion is often accompanied by the data flow from the high-speed link to low-speed link is important with respect to the stability of closed-loop congestion control. The Virtual-Connection Network (VCN) in Gigabit Ethernet networks is a packet-switching based network capable of implementing cell- based connection, link-by-link flow-controlled connection, and single- or multi-destination virtual connections. VCN described herein differ from the virtual channel in ATM literature in that VCN have link-by-link flow control and can be of multi-destination. VCNs support both connection-oriented and connectionless data link layer traffic. Therefore, the worst collision scenario in Ethernet CSMA/CD with virtual collision brings about end-to-end delay. Gigabit Ethernet networks based on CSMA/CD results in non-deterministic behavior because its media access rules are based on random probability. Hence, it is difficult to obtain any sound mathematical formulation for congestion control without employing random processes or fluid-flow models. In this paper, an analytical method for the design of a congestion control scheme is proposed based on Smith＇s principle to overcome instability accompanied with the increase of end-to-end delays as well as to avoid cell losses. To this end, mathematical analysis is provided such that the proposed control scheme guarantees the performance improvement with respect to bandwidth and latency for selected network links with different propagation delays. In addition, guaranteed bandwidth is to be implemented by allowing individual stations to burst several frames at a time without intervening round-trip idle time.