• Title/Summary/Keyword: locking time

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A Study of New Authentication Method in Financial Accounts to Lock and Unlock Using the Smart-Devices (스마트기기를 이용한 금융계좌 잠금 및 해제 인증에 관한 연구)

  • Kim, Kwang Jin;Lee, Sung Joong
    • Journal of Korean Society of Disaster and Security
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    • v.5 no.1
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    • pp.21-28
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    • 2012
  • This study can be solved a means of authentication of electronic financial transactions. We suggest that smart devices can be useful to authenticate in electronic financial transactions regardless of time and place. Our new authentication method named Lock-Unlock authentication method with smart devices. This method will be expected to reduce many kind of accidents (theft, phishing, hacking, certificates and simple certified OTP, ATM withdrawals, ARS, etc.) by account locking in electronic financial transactions. And helpful to users can effectively protect electronic financial transactions and minimize the accident during get a electronic trading.

Comparison of Rapid Braking Characteristics between an Expert Driver and a General Person (전문가와 일반인의 급제동 특성 및 바퀴 잠김 속도 비교)

  • Kim, Kee-Nam;Lee, Ji-Hoon;Kim, Min-Seok;Yoo, Wan-Suk
    • Transactions of the Korean Society of Automotive Engineers
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    • v.17 no.1
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    • pp.12-18
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    • 2009
  • Skid mark and coefficient of friction are usually utilized to calculate the velocity and behavior of vehicles. For a critical case such as traffic accident reconstruction, however, the initial velocity of the car should be calculated precisely. In this study, in order to estimate the speed at the brake onset, rapid braking tests were executed on the proving ground. We compared with a skid length and wheel locking time of an expert driver and a general person. We verified that the skid mark of expert driver occurs longer than general person's. A new method is proposed to determine the speed of a vehicle at the brake onset of maximum braking, which could be applied to a reconstruction of vehicle with Non-ABS.

A Scheme for Efficient Synchronization on Real Time Strategy Games (실시간 전략 시뮬레이션 게임에서의 효율적인 동기화 기법)

  • Kim, Hye-Young;Im, Young-Jong
    • Journal of Korea Game Society
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    • v.10 no.3
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    • pp.83-92
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    • 2010
  • The command that game users give should be reflected to the game immediately and should be transferred to several objects at once. Also, all game users who participate in game should keep the same progress situation in Real-Time Strategy game. But it takes a certain amount of time to get the command pass to other users, and it is important issue that many commands are synchronized in a short amount of time on server of RTS game. Therefore we propose a scheme for an efficient synchronization based on event locking method on RTS game in this paper. We design and implement the gaming server applying to our proposed scheme. Also, we show efficiency of our proposed scheme by performance analysis in this paper.

A study on digital locking device design using detection distance 13.4mm of human body sensing type magnetic field coil (인체 감지형 자기장 코일의 감지거리 13.4mm를 이용한 디지털 잠금장치 설계에 관한 연구)

  • Lee, In-Sang;Song, Je-Ho;Bang, Jun-Ho;Lee, You-Yub
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.1
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    • pp.9-14
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    • 2016
  • This study evaluated a digital locking device design using detection distance of 13.4mm of a human body sensing type magnetic field coil. In contrast to digital locking devices that are used nowadays, the existing serial number entering buttons, lighting, number cover, corresponding pcb, exterior case, and data delivery cables have been deleted and are only composed of control ON/OFF power switches and emergency terminals. When the magnetic field coil substrates installed inside the inner case detects the electric resistance delivered from the opposite side of the 12mm interval exterior contacting the glass body part, the corresponding induced current flows. At this time, the magnetic field coil takes the role as a sensor when coil frequency of the circular coil is transformed. The magnetic coil as a sensor detects a change in the oscillation frequency output before and after the body is detected. This is then amplified to larger than 2,000%, transformed into digital signals, and delivered to exclusive software to compare and search for embedded data. The detection time followed by the touch area of the body standard to a $12.8{\emptyset}$ magnetic field coil was 30% contrast at 0.08sec and 80% contrast at 0.03sec, in which the detection distance was 13.4mm, showing the best level.

An Analog Multi-phase DLL for Harmonic Lock Free (Harmonic Locking을 제거하기 위한 아날로그 Multi- phase DLL 설계)

  • 문장원;곽계달
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.281-284
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    • 2001
  • This paper describes an analog multi-phase delay-locked loop (DLL) to solve the harmonic lock problem using current-starved inverter and shunt-capacitor delay cell. The DLL can be used not only as an internal clock buffer of microprocessors and memory It's but also as a multi-phase clock generator for gigabit serial interfaces. The proposed circuit was simulated in a 0.25${\mu}{\textrm}{m}$ CMOS technology to solve harmonic lock problem and to realize fast lock-on time and low-jitter we verified time interval less than 40 ps as the simulation results.

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0.11-2.5 GHz All-digital DLL for Mobile Memory Interface with Phase Sampling Window Adaptation to Reduce Jitter Accumulation

  • Chae, Joo-Hyung;Kim, Mino;Hong, Gi-Moon;Park, Jihwan;Ko, Hyeongjun;Shin, Woo-Yeol;Chi, Hankyu;Jeong, Deog-Kyoon;Kim, Suhwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.3
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    • pp.411-424
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    • 2017
  • An all-digital delay-locked loop (DLL) for a mobile memory interface, which runs at 0.11-2.5 GHz with a phase-shift capability of $180^{\circ}$, has two internal DLLs: a global DLL which uses a time-to-digital converter to assist fast locking, and shuts down after locking to save power; and a local DLL which uses a phase detector with an adaptive phase sampling window (WPD) to reduce jitter accumulation. The WPD in the local DLL adjusts the width of its sampling window adaptively to control the loop bandwidth, thus reducing jitter induced by UP/DN dithering, input clock jitter, and supply/ground noise. Implemented in a 65 nm CMOS process, the DLL operates over 0.11-2.5 GHz. It locks within 6 clock cycles at 0.11 GHz, and within 17 clock cycles at 2.5 GHz. At 2.5 GHz, the integrated jitter is $954fs_{rms}$, and the long-term jitter is $2.33ps_{rms}/23.10ps_{pp}$. The ratio of the RMS jitter at the output to that at the input is about 1.17 at 2.5 GHz, when the sampling window of the WPD is being adjusted adaptively. The DLL consumes 1.77 mW/GHz and occupies $0.075mm^2$.

A Novel Fast Open-loop Phase Locking Scheme Based on Synchronous Reference Frame for Three-phase Non-ideal Power Grids

  • Xiong, Liansong;Zhuo, Fang;Wang, Feng;Liu, Xiaokang;Zhu, Minghua;Yi, Hao
    • Journal of Power Electronics
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    • v.16 no.4
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    • pp.1513-1525
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    • 2016
  • Rapid and accurate phase synchronization is critical for the reliable control of grid-tied inverters. However, the commonly used software phase-locked loop methods do not always satisfy the need for high-speed and accurate phase synchronization under severe grid imbalance conditions. To address this problem, this study develops a novel open-loop phase locking scheme based on a synchronous reference frame. The proposed scheme is characterized by remarkable response speed, high accuracy, and easy implementation. It comprises three functional cascaded blocks: fast orthogonal signal generation block, fast fundamental-frequency positive sequence component construction block, and fast phase calculation block. The developed virtual orthogonal signal generation method in the first block, which is characterized by noise immunity and high accuracy, can effectively avoid approximation errors and noise amplification in a wide range of sampling frequencies. In the second block, which is the foundation for achieving fast phase synchronization within 3 ms, the fundamental-frequency positive sequence components of unsymmetrical grid voltages can be achieved with the developed orthogonal signal construction strategy and the symmetrical component method. The real-time grid phase can be consequently obtained in the third block, which is free from self-tuning closed-loop control and thus improves the dynamic performance of the proposed scheme. The proposed scheme is adaptive to severe unsymmetrical grid voltages with sudden changes in magnitude, phase, and/or frequency. Moreover, this scheme is able to eliminate phase errors induced by harmonics and random noise. The validity and utility of the proposed scheme are verified by the experimental results.

Update Propagation of Replicated Spatial Data using New Locking Techniques in Distributed Geographic Information System (분산된 지리정보시스템에서 새로운 잠금기법을 이용한 중복된 공간 데이터의 변경 전파)

  • Choe, Jin-O;Hong, Bong-Hui
    • Journal of KIISE:Software and Applications
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    • v.26 no.9
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    • pp.1061-1072
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    • 1999
  • 한 개 이상의 사이트에 공간 데이타가 중복 저장된 분산 공간 DB에서, 동시에 수행될 수 있는 긴 트랜잭션의 변경은 일관성 제어를 위해 다른 사이트에 전파되어야 한다. 이때 같은 영역의 공간 데이타를 서로 다른 사이트에서 동시에 변경할 경우, 변경 상충 문제가 발생하거나 잠금 기법에 의한 오랜 대기 시간이 초래되는 문제가 있다. 또한 공간 객체는 잠금의 대상이 아닌 공간 관련성에 의한 종속성을 가진다.이 논문은 긴 트랜잭션으로 중복된 공간 데이타를 변경할 경우 중복 제어를 위한 변경 전파와 동시성 제어 문제를 다룬다. 중복된 공간 데이타의 변경 병렬성을 향상시키기 위해 영역 잠금 및 SR-bound WRITE 잠금 기법을 제시한다. 한 사이트에서 수정하는 객체들과 다른 사이트에서 수정하는 객체들 사이에 공간 관련성에 의한 종속성이 없을 경우 병렬 수정을 허용하도록 제어하며, 공간 관련성에 의한 종속성이 있을 경우 SR-based 2PC라 불리는, 확장된 2단계 완료 프로토콜로 협동작업을 수행해서 변경 상충을 해결하는 새로운 중복 제어 기법을 설계하고 구현한다.Abstract The update of a long transaction should be propagated to the other sites for consistency control, when spatial database are replicated at multiple sites to achieve availability, reliability, and performance. When the replicated spatial data are updated at the same time, the update of one site would be conflicted with the other or a user would not be able to access the replicated spatial data under the control of locking. Two spatial objects having spatial relationships should be cooperatively updated even if there are no conflicts of locking for them.This paper deals with the issues of concurrency control and update propagation of replicated spatial data. We present the concept of region lock and SR-bound WRITE lock for enhancing the parallelism of updating the replicated spatial data. If there are no spatial relationships between one site's objets and the other's objects, parallel update would be allowed. Concurrent update of two spatial objects having spatial relationships should be propagated and cooperated by using an extended two-phase commit protocol, called spatial relationship-based 2PC.

A Phase Locked Loop with Resistance and Capacitance Scaling Scheme (저항 및 커패시턴스 스케일링 구조를 이용한 위상고정루프)

  • Song, Youn-Gui;Choi, Young-Shig;Ryu, Ji-Goo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.4
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    • pp.37-44
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    • 2009
  • A novel phase-locked loop(PLL) architecture with resistance and capacitance scaling scheme has been proposed. The proposed PLL has three charge pumps. The effective capacitance and resistance of the loop filter can be scaled up/down according to the locking status by controlling the direction and magnitude of each charge pump current. This architecture makes it possible to have a narrow bandwidth and low resistance in the loop filter, which improves phase noise and reference spur characteristics. It has been fabricated with a 3.3V $0.35{\mu}m$ CMOS process. The measured locking time is $25{\mu}s$ with the measured phase noise of -105.37 dBc/Hz @1MHz and the reference spur of -50dBc at 851.2MHz output frequency