• The Transactions of the Korea Information Processing Society
• /
• v.7 no.7
• /
• pp.2060-2071
• /
• 2000

Scheduling parallel tasks, represented as a Directed Acyclic Graph (DAG) or task graph, on a multiprocessor system has been an important research area in the past decades. List scheduling algorithms assign priorities to a node or an edge in an input DAG, and then generate a schedule according to the assigned priorities. This appear proposes a list scheduling algorithms with effective method of priority assignments. The paper also analyzes the worst case performance and optimality condition for the proposed algorithm. The performance comparison study shows that the proposed algorithms outperforms existing scheduling algorithms especially for input DAGs with high communication overheads. The performance improvement over existing algorithms becomes larger as the input DAG becomes more dense and the level of parallelism in the DAG is increased.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.46 no.3
• /
• pp.86-95
• /
• 2009

Efficient DAG scheduling is critical for achieving high performance in heterogeneous computing environments. Finding an optimal solution to the problem of scheduling an application modeled by a directed acyclic graph(DAG) onto a set of heterogeneous machines is known to be an NP-complete problem. In this paper we propose a new list scheduling algorithm, called the Heterogeneous Rank-Path Scheduling(HRPS) algorithm, to exploit all of a program's available parallelism in distributed heterogeneous computing system. The primary goal of HRPS is to minimize the schedule length of applications. The performance of the algorithm has been observed by its application to some practical DAGs, and by comparing it with other existing scheduling algorithm such as CPOP, HCPT and FLB in term of the schedule length. The comparison studies show that HRPS significantly outperform CPOP, HCPT and FLB in schedule length.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.47 no.1
• /
• pp.135-145
• /
• 2010

Efficient Directed Acyclic Graph(DAG) scheduling is critical for achieving high performance in Distributed Heterogeneous computing System(DHCS). In this paper, we present a new high-performance scheduling algorithm, called the LCFT(Levelized Critical First Task) algorithm, for DHCS. The LCFT algorithm is a list-based scheduling that uses a new attribute to efficiently select tasks for scheduling in DHCS. The complexity of LCFT is $O(\upsilon+e)(p+log\;\upsilon)$. The performance of the algorithm has been observed by its application to some practical DAGs, and by comparing it with other existing scheduling algorithms such as PETS, HPS, HCPT and GCA in terms of the schedule length and SpeedUp. The comparison studies show that LCFT significantly outperforms PETS, HPS, HCPT and GCA in schedule length, SpeedUp.

• Journal of KIISE:Computer Systems and Theory
• /
• v.37 no.2
• /
• pp.76-89
• /
• 2010

The performance of Distributed Heterogeneous Computing System depends on the algorithm which schedules input DAG graph. Among various scheduling algorithms, list scheduling algorithm provides superior performance with low complexity. List scheduling consists of task prioritizing phase and processor allocation phase, but most studies only focus on task prioritizing phase. In this paper, we propose LIP policy which has the same complexity with traditional allocation policies but has superior performance. The performance of LIP has been observed by applying them to task prioritizing phase of traditional list scheduling algorithms, HCPT, HEFT, GCA, and PETS. The results show that LIP has better performance than insertion-based policy and non-insertion-based policy, which are traditional processor allocation policies.

• Journal of Korean Society of Industrial and Systems Engineering
• /
• v.14 no.24
• /
• pp.53-69
• /
• 1991

This paper is concerned with software developments for scheduling and sequencing of FMS. The scheduling algorithms are developed for 3 types of FMS:single machine type FMS, flowshop type FMS. assembly line type FMS. For the single machine type FMS. full enumeration algorithm is used. For the flowshop type FMS heuristic algorithms are developed. For the assembly type FMS the exsisting PERT/CPM algorithm is applied. Numerical examples are presented for illustration of each algorithm. Each soft ware program list are attached as appendices.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.47 no.4
• /
• pp.71-81
• /
• 2010

In grid system, Task scheduling based on list scheduling models has showed low complexity and high efficiency in fully connected processor set environment. However, earlier schemes did not consider sufficiently the communication cost among tasks and the composition process of lightpath for communication in optical gird environment. In this thesis, we propose LSOG (Leveling Selection in Optical Grid) which sets task priority after forming a hierarchical directed acyclic graph (DAG) that is optimized in optical grid environment. To determine priorities of task assignment in the same level, proposed algorithm executes the task with biggest communication cost between itself and its predecessor. Then, it considers the shortest route for communication between tasks. This process improves communication cost in scheduling process through optimizing link resource usage in optical grid environment. We compared LSOG algorithm with conventional ELSA (Extended List Scheduling Algorithm) and SCP (Scheduled Critical Path) algorithm. We could see the enhancement in overall scheduling performance through increment in CCR value and smoothing network environment.

• Proceedings of the KSME Conference
• /
• 2000.04a
• /
• pp.797-802
• /
• 2000

Flow shop scheduling problem involves processing several jobs on common facilities where a setup time Is incurred whenever there is a switch of jobs. Practical aspect of scheduling focuses on finding a near-optimum solution within a feasible time rather than striving for a global optimum. In this paper, a hybrid meta-heuristic method called tabu-genetic algorithm(TGA) is suggested, which combines the genetic algorithm(GA) with tabu list. The experiment shows that the proposed TGA can reach the optimum solution with higher probability than GA or SA(Simulated Annealing) in less time than TS(Tabu Search). It also shows that consideration of setup time becomes more important as the ratio of setup time to processing time increases.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.6
• /
• pp.58-64
• /
• 2009

For the success of the reconfigurable computing, the algorithm for mapping operations onto coarse-grained reconfigurable architecture is very important. This paper proposes a resource-aware mapping system for the coarse-grained reconfigurable architecture and its own underlying heuristic algorithm. The operation assignment and the routing path allocation are simultaneously performed with a cycle-accurate time-exclusive resource model. The proposed algorithm minimizes the communication resource usage and the global memory access with the list scheduling heuristic. The operation to be mapped are prioritized with general properties of data flow. The evaluations of the proposed algorithm show that the performance is significantly enhanced in several benchmark applications.

• Journal of the Institute of Convergence Signal Processing
• /
• v.10 no.2
• /
• pp.141-145
• /
• 2009

A C-to-SystemC synthesizer which processes the input behavior according to high-level synthesis, and then transforms the synthesis result into SystemC module code is implemented in this paper. In the synthesis process, the input behavioral description in C source code is scheduled using list scheduling algorithm and register allocation is performed using left-edge algorithm on the result of scheduling. In the SystemC process, the output from high-level synthesis process is transformed into SystemC module code by combining it with SystemC features such as channels and ports. The operation of the implemented C-to-SystemC synthesizer is validated through simulating the synthesis of elliptic wave filter in SystemC code. C-to-SystemC synthesizer can be used as a part of tool-chain which helps to implement SystemC design methodology covering from modeling to synthesis.

• Journal of the Korean Geophysical Society
• /
• v.4 no.3
• /
• pp.163-173
• /
• 2001

This paper deals with scheduling problems which are the most important subtask in High-Level Synthesis. Especially, we have concentrated our attentions on the data-path scheduling which can get the structural informaion trom the behavioral algorithm as a first step in synthesis procedure. Suggest Forward scheduling methode is executed the ASAP and ALAP scheduling to use the fifth - order elliptic wave filter of a standard benchmark moedl, and then it is drawing up T.N matrix table by the number resource and control-step, using the table extract of the simple than down-limit value of the control-step for the number of given resource th use this table. All of existing list scheduling techniques determine the priority function first, and then do the operation scheduling, But, the suggested forward scheduling technique does the schedule first, and determines the priority functions if needed in scheduling process.