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K-Nearest Neighbor Associative Memory with Reconfigurable Word-Parallel Architecture

  • An, Fengwei;Mihara, Keisuke;Yamasaki, Shogo;Chen, Lei;Mattausch, Hans Jurgen
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.405-414
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    • 2016
  • IC-implementations provide high performance for solving the high computational cost of pattern matching but have relative low flexibility for satisfying different applications. In this paper, we report an associative memory architecture for k nearest neighbor (KNN) search, which is one of the most basic algorithms in pattern matching. The designed architecture features reconfigurable vector-component parallelism enabled by programmable switching circuits between vector components, and a dedicated majority vote circuit. In addition, the main time-consuming part of KNN is solved by a clock mapping concept based weighted frequency dividers that drastically reduce the in principle exponential increase of the worst-case search-clock number with the bit width of vector components to only a linear increase. A test chip in 180 nm CMOS technology, which has 32 rows, 8 parallel 8-bit vector-components in each row, consumes altogether in peak 61.4 mW and only 11.9 mW for nearest squared Euclidean distance search (at 45.58 MHz and 1.8 V).

A Proposal of 3 Point Search Algorithm for Optimal Design (최적 설계를 위한 3점 탐색 알고리즘의 제안)

  • 김주홍;공휘식
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.16 no.7
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    • pp.640-650
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    • 1991
  • In the paper, the threepoint search algorithm used direct search method for optimal design is proposed. Proposed algorithm is composed of two iteration procedure to determine the minimum value of performance index. The minumum value of three-point existing in the inner N-order searching is firstly determined and next searching space is then reduced by the result of first procedure. To compute performance index. 3N iteration for a searching is necessary. 3N searching method is also described and confirmed with exception of parameter included multiphicator and divisor. Proposed algorithm have good stability and reliability when performance index is linear or quadratic function.

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Detection Techniques for MIMO Multiplexing: A Comparative Review

  • Mohaisen, Manar;An, Hong-Sun;Chang, Kyung-Hi
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.3 no.6
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    • pp.647-666
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    • 2009
  • Multiple-input multiple-output (MIMO) multiplexing is an attractive technology that increases the channel capacity without requiring additional spectral resources. The design of low complexity and high performance detection algorithms capable of accurately demultiplexing the transmitted signals is challenging. In this technical survey, we introduce the state-of-the-art MIMO detection techniques. These techniques are divided into three categories, viz. linear detection (LD), decision-feedback detection (DFD), and tree-search detection (TSD). Also, we introduce the lattice basis reduction techniques that obtain a more orthogonal channel matrix over which the detection is done. Detailed discussions on the advantages and drawbacks of each detection algorithm are also introduced. Furthermore, several recent author contributions related to MIMO detection are revisited throughout this survey.

A Distributed Power Optimization Method for CDMA Cellular Mobile Systems Using an Adaptive Search Scheme

  • Lee, Young-Dae
    • 제어로봇시스템학회:학술대회논문집
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    • 2003.10a
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    • pp.1982-1985
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    • 2003
  • Future cellular networks will mainly be driven by, high quality channels, high band with utilization, low power consumption and efficient network management. For a given channel allocation, the capacity and quality of communication of cellular radio systems using CDMA(Code Division Multiple Access) can be increased by using a transmitter power control scheme to combat the near-far problem. Centralized power control schemes or distributed ones to maximize the minimum signal-to-interference in each user of CDMA wireless network have been investigated. This paper has proposed a distributed power control algorithm, which employs an adaptive search scheme, in order to solve quickly the linear systems of equations for power update in CDMA cellular radio systems. The simulation results show that the proposed scheme has faster convergence rate than the typical bang-bang type of distributed power control algorithm, which has been much used as a reference algorithm in IS-95A and W-CDMA communication network.

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Robustness, Data Analysis, and Statistical Modeling: The First 50 Years and Beyond

  • Barrios, Erniel B.
    • Communications for Statistical Applications and Methods
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    • v.22 no.6
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    • pp.543-556
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    • 2015
  • We present a survey of contributions that defined the nature and extent of robust statistics for the last 50 years. From the pioneering work of Tukey, Huber, and Hampel that focused on robust location parameter estimation, we presented various generalizations of these estimation procedures that cover a wide variety of models and data analysis methods. Among these extensions, we present linear models, clustered and dependent observations, times series data, binary and discrete data, models for spatial data, nonparametric methods, and forward search methods for outliers. We also present the current interest in robust statistics and conclude with suggestions on the possible future direction of this area for statistical science.

Global Search for Optimal Geometric Path amid Obstacles Considering Manipulator Dynamics (로봇팔의 동역학을 고려한 장애물 속에서의 최적 기하학적 경로에 대한 전역 탐색)

  • 박종근
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1995.10a
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    • pp.1133-1137
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    • 1995
  • This paper presents a numerical method of the global search for an optimal geometric path for a manipulator arm amid obstacles. Finite term quintic B-splines are used to describe an arbitrary point-to-point manipulator motion with fixed moving time. The coefficients of the splines span a linear vector space, a point in which uniquely represents the manipulator motion. All feasible geometric paths are searched by adjusting the seed points of the obstacle models in the penetration growth distances. In the numerical implementation using nonlinear programming, the globally optimal geometric path is obtained for a spatial 3-link(3-revolute joints) manipulator amid several hexahedral obstacles without simplifying any dynamic or geometric models.

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Real-time Footstep Planning and Following for Navigation of Humanoid Robots

  • Hong, Young-Dae
    • Journal of Electrical Engineering and Technology
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    • v.10 no.5
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    • pp.2142-2148
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    • 2015
  • This paper proposes novel real-time footstep planning and following methods for the navigation of humanoid robots. A footstep command is defined by a walking direction and step lengths for footstep planning. The walking direction is determined by a uni-vector field navigation method, and the allowable yawing range caused by hardware limitation is considered. The lateral step length is determined to avoid collisions between the two legs while walking. The sagittal step length is modified by a binary search algorithm when collision occurs between the robot body and obstacles in a narrow space. If the robot body still collides with obstacles despite the modification of the sagittal step length, the lateral step length is shifted at the next footstep. For footstep following, a walking pattern generator based on a 3-D linear inverted pendulum model is utilized, which can generate modifiable walking patterns using the zero-moment point variation scheme. Therefore, it enables a humanoid robot to follow the footstep command planned for each footstep. The effectiveness of the proposed method is verified through simulation and experiment.

About fully Polynomial Approximability of the Generalized Knapsack Problem (일반배낭문제의 완전다항시간근사해법군의 존재조건)

  • 홍성필;박범환
    • Journal of the Korean Operations Research and Management Science Society
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    • v.28 no.4
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    • pp.191-198
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    • 2003
  • The generalized knapsack problem or gknap is the combinatorial optimization problem of optimizing a nonnegative linear function over the integral hull of the intersection of a polynomially separable 0-1 polytope and a knapsack constraint. The knapsack, the restricted shortest path, and the constrained spanning tree problem are a partial list of gknap. More interesting1y, all the problem that are known to have a fully polynomial approximation scheme, or FPTAS are gknap. We establish some necessary and sufficient conditions for a gknap to admit an FPTAS. To do so, we recapture the standard scaling and approximate binary search techniques in the framework of gknap. This also enables us to find a weaker sufficient condition than the strong NP-hardness that a gknap does not have an FPTAS. Finally, we apply the conditions to explore the fully polynomial approximability of the constrained spanning problem whose fully polynomial approximability is still open.

Design of pitch parameter search architecture for a speech coder using dual MACs (Dual MAC을 이용한 음성 부호화기용 피치 매개변수 검색 구조 설계)

  • 박주현;심재술;김영민
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.5
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    • pp.172-179
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    • 1996
  • In the paper, QCELP (qualcomm code excited linear predictive), CDMA (code division multiple access)'s vocoder algorithm, was analyzed. And then, a ptich parameter seaarch architecture for 16-bit programmable DSP(digital signal processor) for QCELP was designed. Because we speed up the parameter search through high speed DSP using two MACs, we can satisfy speech codec specifiction for the digital celluar. Also, we implemented in FIFO(first-in first-out) memory using register file to increase the access time of data. This DSP was designed using COMPASS, ASIC design tool, by top-down design methodology. Therefore, it is possible to cope with rapid change at mobile communication market.

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Error Wire Locating Technology with Breadth-first Search Algorithm (Breadth-first 검색 알고리즘을 이용한 와이어 오류 검출에 관한 연구)

  • Jian, Xu;Lee, Jeung-Pyo;Lee, Jae-Chul;Kim, Eal-Goo;Park, Jae-Hong
    • Proceedings of the KIEE Conference
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    • 2007.04a
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    • pp.258-260
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    • 2007
  • Nowadays the automotive circuit design becomes more complicated a practical modern car circuit usually contains thousands of wires. So the error connection between connector and pins becomes more difficult to be located. This paper proposes a general way to locate all error wires in an automotive circuit design. Firstly, we give an exact definition of error wire to guide our job. This definition also composes the core part of our algorithm. Then we limit the area of the error wires by several steps. During these steps, we apply breadth-first search method to step over all wires under consideration of reducing time cost. In addition, we apply bidirectional stack technique to organize the data structure for algorithm optimization. This algorithm can get a result with all error wires and doubtful wires in a very efficient way. The analysis of this algorithm shows that the complexity is linear. We also discuss some possible improvement of this algorithm.

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