• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 B
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• pp.533-535
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• 1997

Chua's circuit is a simple electronic network which exhibits a variety of bifurcation and attractors. The circuit consists of two capacitors, an inductor, a linear resistor, and a nonlinear resistor. In this paper we analyze a circuit obtained by replacing the parallel LC resonator in the Chua's circuit by lossless transmission line. By using the method of characteristics of this circuit we show that various periodic motions and chaotic motions can the attained according to parameter variations. From Chua's circuit with a lossless transmission line, a variety of chaotic attractors which are similar to those of the normal Chua's circuit are observed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 B
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• pp.624-626
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• 1997

Canonical Chua's circuit is a simple electronic circuit which exhibits a variety of bifurcation phenomena and attractors. It consists of two capacitors, an inductor, two linear resistors, and a nonlinear resistor. When the circuit exhibits chaotic signals, the nonlinear resistor of canonical Chua's circuit may have three different voltage - current characteristics. In this paper, the design methodology for practical implementation of the nonlinear resistors which have all these characteristics is described. In addition, the effectiveness of result is shown by not only the MATLAB simulation but also the PSPICE simulation.

• 한국지능시스템학회:학술대회논문집
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• 한국퍼지및지능시스템학회 2000년도 춘계학술대회 학술발표 논문집
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• pp.166-169
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• 2000

Chua's circuit is a simple electronic network which exhibits a variety of bifurcati on and attractors. The circuit consists of two capacitors, an inductor, a linear resistor, and a nonlinear resistor. In this paper, a transmitter and a receiver using two identical Chua's circuitsare proposed and a transmission secure communications are investigated. A secure communication method in which the desired information signal is synthesized with the chaos signal created by the Chua's circuit is proposed and information signal is demodulated also using the Chua's circuit. The proposed method is synthesizing the desired information with the chaos circuit by adding the information signal to the chaos signal in the power lime.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 D
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• pp.2407-2409
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• 2000

Chua's circuit is a simple electronic network which exhibits a variety of bifurcation and attractors. The circuit consists of two capacitors, an inductor, a linear resistor, and a nonlinear resistor. In this paper, a transmitter and a receiver using two identical Chua's circuits are proposed and a equivalent T type wire secure communications are investigated. A secure communication method in which the desired information signal is synthesized with the chaos signal created by the Chua's circuit is proposed and information signal is demodulated also using the Chua's circuit. The proposed method is synthesizing the desired information with the chaos circuit by adding the information signal to the chaos signal in the wire transmission system.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 하계학술대회 논문집 B
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• pp.664-666
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• 1995

Chua's circuit is a simple electronic network which exhibits a variety of bifurcation and attractors. The circuit consists of two capacitors, an inductor, a linear resistor and a nonlinear resistor. This paper describes the implementation for a practical op amp of Chua's circuit. In experiment results, 1 periodic motion, 2 periodic motion, rossler type attractors, stranger chaotic attractor periodic window and limit cycle are shown, which are coincide with computer simulation.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 1999년도 추계종합학술대회
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• pp.505-508
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• 1999

Chua's circuit is a simple electronic network which exhibits a variety of bifurcati ell and attractors. The circuit consists of two capacitors, an inductor, a linear resistor, and a nonlinear resistor. In this paper, a transmitter and a receiver using two identical Chua's circuits are proposed and a secure communications of lossless transmission line are investigated. A secure communication method in which tile desired information signal is synthesized with the chaos signal created by the Chua's circuit is proposed and information signal is demodulated also using the Chua's circuit. Tile proposed method is synthesizing tile desired information with the chaos circuit by adding the information signal to the chaos signal in the lossless transmission system.

• Journal of electromagnetic engineering and science
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• 제7권1호
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• pp.42-46
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• 2007

This paper presents a linear amplitude equalizer developed to secure the linearity of the slope of the amplitude over the frequency band ranging $2\sim18\;GHz$. The circuit model is featured by the resistor placed between each pair of a transmission-line and a stub. The design includes finding the values of resistors and stubs to have the optimal linear slope and return loss performances. The measured data show the acceptable performances of the slope variation and return loss over $2\sim18\;GHz$.

• 전자공학회논문지
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• 제50권12호
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• pp.80-87
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• 2013

저가, 광대역, 그리고 넓은 이득 제어 범위를 갖는 전자 계측 시스템을 실현하기 위한 정극성 전류 컨베이어(positive polarity current-conveyor : CCII+)를 사용한 새로운 계측 증폭기(instrumentation amplifier : IA)를 설계하였다. 이 IA는 두 개의 CCII+, 세 개의 저항 그리고 한 개의 연산 증폭기(operational amplifier : op-amp)로 구성된다. 동작 원리는 두 입력 전압의 차가 전압 및 전류 폴로워(follower) 사용되는 두 개의 CCII+에 의해 각각 동일한 전류로 변환되고 이 전류는 op-amp의 (+)단자의 저항기와 귀환 저항기를 통과시켜 출력 전압을 구하는 것이다. IA의 동작 원리를 확인하기 위해 AB급 CCII+를 설계하였고 상용 op-amp LF356을 사용하여 IA를 구현하였다. 시뮬레이션 결과 CCII+를 사용한 전압 폴로워는 ${\pm}$4V의 선형범위에서 0.21mV의 오프셋 전압을 갖고 있었다. IA는 1개의 저항기의 저항값 변화로 -20dB~+60dB의 이득을 갖고 있으며, 60dB에 대한 -3dB 주파수는 400kHz이였다. 제안한 IA의 외부의 저항기의 정합이 필요 없고 다른 저항기로 오프셋을 조절할 수 있는 장점을 갖고 있다. 소비전력은 ${\pm}$5V 공급전압에서 130mW이였다.

• 전자공학회논문지A
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• 제33A권12호
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• pp.104-109
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• 1996

A current-controlling transadmittance amplifier is proposed. It consists of a linear transadmittor and a current gain cell followed by three current mirrors. The proposed transadmittance amplifier is used to design a current-controlling frequency-dependent negative resistor (FDNR). Experimental results are presented to verify theoretical predictions. The results show close agreement between predicted behaviour and experimental performance.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.208-211
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• 1999

Abstract - Electrical characteristics or asymmetric n-MOSFET's with different source and drain geometry are experimently investigated using test structures having various gate width. Saturation drain current and resistance in linear region are estimated by a simple schematic model, which consists of conventional device having parasitic resistor. A comparison of experimental results of symmetric and asymmetric devices gives the parasitic resistance caused by abnormal device structure. The suggested model shows good agreement with the measured drain current for both forward- and reverse-modes.