• Title/Summary/Keyword: linear resistor

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A Study of Low-Voltage Low-Power Bipolar Linear Transconductor and Its Application to OTA (저전압 저전력 바이폴라 선형 트랜스컨덕터와 이를 이용한 OTA에 관한 연구)

  • Shin, Hee-Jong;Chung, Won-Sup
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.37 no.1
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    • pp.40-48
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    • 2000
  • 1A novel bipolar linear transconductor and its application to operational transconductance amplifier(OTA) for low-voltage low-power signal processing is proposed. The transconductor consists of a npn differential-pair with emitter degeneration resistor and a pnp differential-pair connected to the npn differential-pair in cascade. The bias current of the pnp differential-pair is used with the output current of the npn differential-pair for wide linearity and temperature stability. The OTA consists of the linear transconductor and a translinear current cell followed by three current mirrors. The proposed transconductor has superior linearity and low-voltage low-power characteristics when compared with the conventional transconductor. The experimental results show that the transconductor with transconductance of 50 ${\mu}S$ has a linearity error of less than ${\pm}$0.06% over an input voltage range from -2V to +2V at supply voltage ${\pm}$3V. Power dissipation of the transconductor was 2.44 mW. A prototype OTA with a transconductance of 25 ${\mu}S$ has been built with bipolar transistor array. The linearity of the OTA was same as the proposed transconductor. The OTA circuit also exhibits a transconductance that is linearly dependent on a bias current varying over four decades with a sensitivity of 0.5 S/A.

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Investigation of miximum permitted error limits for second order sigma-delta modulator with 14-bit resolution (14 비트 분해능을 갖는 2차 Sigma-Delta 변조기 설계를 위한 구성요소의 최대에러 허용 범위 조사)

  • Cho, Byung-Woog;Choi, Pyung;Sohn, Byung-Ki
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.5
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    • pp.1310-1318
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    • 1998
  • Sigma-delta converter is frequently used for conyerting low-frequency anglog to digital signal. The converter consists of a modulator and a digital filer, but our work is concentrated on the modulator. In this works, to design second-order sigma-dalta modulator with 14bit resolution, we define maximumerror limits of each components (operational smplifier, integrator, internal ADC, and DAC) of modulator. It is first performed modeling of an ideal second-order sigma-delta modulator. This is then modified by adding the non-ideal factors such as limit of op-amp output swing, the finit DC gain of op-amp slew rate, the integrator gian error by the capacitor mismatch, the ADC error by the cmparator offset and the mismatch of resistor string, and the non-linear of DAC. From this modeling, as it is determined the specification of each devices requeired in design and the fabrication error limits, we can see the final performance of modulator.

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An 8b 200MHz Time-Interleaved Subranging ADC With a New Reference Voltage Switching Scheme (새로운 기준 전압 인가 방법을 사용하는 8b 200MHz 시간 공유 서브레인징 ADC)

  • Moon, Jung-Woong;Yang, Hee-Suk;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.39 no.4
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    • pp.25-35
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    • 2002
  • This work describes an 8b 200MHz time-interleaved subranging analog-to-digital converter (ADC) based on a single-poly digital CMOS process. Two fine ADCs for lower digital bits of the proposed ADC employ a time-sharing double-channel architecture to increase system speed and a new reference voltage switching scheme to reduce settling time of the reference voltages and chip area. The proposed intermeshed resistor string, which generates reference voltages for fine ADCs, improves linearity and settling time of the reference voltages simultaneously. The proposed sample- and-hold amplifier(SHA) is based on a highly linear common-drain amplifier and passive differential circuits to minimize power consumption and chip area with 8b accuracy and employs input dynamic common mode feedback circuits for high dynamic performance at a 200MHz sampling rate. A new encoding circuit in a coarse ADC simplifies the signal processing between the coarse ADC and two successive fine ADCs.

A Study on the Ubiquitous Wireless Tilt Sensors's Application for Measuring Vertical Deflection of Bridge (교량의 수직처짐 측정을 위한 유비쿼터스 무선경사센서 활용연구)

  • Jo, Byung Wan;Yoon, Kwang Won;Kim, Young Ji;Lee, Dong Yoon
    • Journal of the Korea institute for structural maintenance and inspection
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    • v.15 no.3
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    • pp.116-124
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    • 2011
  • In this study, a new method to estimate the bridge deflection is developed by using Wireless Tilt Sensor. Most of evaluations of structural integrity, it is very important to measure the geometric profile, which is a major factor representing the global behavior of civil structure, especially bridges. In the past, Because of the lack of appropriate methods to measure the deflection curve of bridges on site, the measurement of deflection had been done restrictly within just a few discrete points along the bridge. Also the measurement point could be limited to locations installed with displacement transducers. So, in this study, the deflection of the structure was measured by wireless tilt sensor instead of LVDT(Linear Variable Differential Transformer). Angle change of tilt sensor shows structural behavior by the change of the resistor values which is presented to voltage. Moreover, the maximum deflection was calculated by changing the deflection angle which was calculated as V(measured voltage) ${\times}$F(factor) to deflection. The experimental tests were carried out to verify the developed deflection estimation techniques. Because the base of tilt measuring is the gravity, uniform measurement is possible independent of a measuring point. Also, measuring values were showed very high accuracy.

Active and Passive Suppression of Composite Panel Flutter Using Piezoceramics with Shunt Circuits (션트회로에 연결된 압전세라믹을 이용한 복합재료 패널 플리터의 능동 및 수동 제어)

  • 문성환;김승조
    • Composites Research
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    • v.13 no.5
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    • pp.50-59
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    • 2000
  • In this paper, two methods to suppress flutter of the composite panel are examined. First, in the active control method, a controller based on the linear optimal control theory is designed and control input voltage is applied on the actuators and a PZT is used as actuator. Second, a new technique, passive suppression scheme, is suggested for suppression of the nonlinear panel flutter. In the passive suppression scheme, a shunt circuit which consists of inductor-resistor is used to increase damping of the system and as a result the flutter can be attenuated. A passive damping technology, which is believed to be more robust suppression system in practical operation, requires very little or no electrical power and additional apparatuses such as sensor system and controller are not needed. To achieve the great actuating force/damping effect, the optimal shape and location of the actuators are determined by using genetic algorithms. The governing equations are derived by using extended Hamilton's principle. They are based on the nonlinear von Karman strain-displacement relationship for the panel structure and quasi-steady first-order piston theory for the supersonic airflow. The discretized finite element equations are obtained by using 4-node conforming plate element. A modal reduction is performed to the finite element equations in order to suppress the panel flutter effectively and nonlinear-coupled modal equations are obtained. Numerical suppression results, which are based on the reduced nonlinear modal equations, are presented in time domain by using Newmark nonlinear time integration method.

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