• 대한수학회지
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• 제58권1호
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• pp.29-44
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• 2021

The set D of column vectors of a generator matrix of a linear code is called a defining set of the linear code. In this paper we consider the problem of constructing few-weight (mainly two- or three-weight) linear codes from defining sets. It can be easily seen that we obtain an one-weight code when we take a defining set to be the nonzero codewords of a linear code. Therefore we have to choose a defining set from a non-linear code to obtain two- or three-weight codes, and we face the problem that the constructed code contains many weights. To overcome this difficulty, we employ the linear codes of the following form: Let D be a subset of ��2n, and W (resp. V ) be a subspace of ��2 (resp. ��2n). We define the linear code ��D(W; V ) with defining set D and restricted to W, V by $${\mathcal{C}}_D(W;V )=\{(s+u{\cdot}x)_{x{\in}D^{\ast}}|s{\in}W,u{\in}V\}$$. We obtain two- or three-weight codes by taking D to be a Vasil'ev code of length n = 2m - 1(m ≥ 3) and a suitable choices of W. We do the same job for D being the complement of a Vasil'ev code. The constructed few-weight codes share some nice properties. Some of them are optimal in the sense that they attain either the Griesmer bound or the Grey-Rankin bound. Most of them are minimal codes which, in turn, have an application in secret sharing schemes. Finally we obtain an infinite family of minimal codes for which the sufficient condition of Ashikhmin and Barg does not hold.

• East Asian mathematical journal
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• 제17권1호
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• pp.167-174
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• 2001

We find the generalized Hamming weights of cyclic linear q-ary codes which are generated by a codeword of weight 2, and of any length.

• ETRI Journal
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• 제32권4호
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• pp.588-595
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• 2010

This paper proposes encoding and decoding for nonlinear product codes and investigates the performance of nonlinear product codes. The proposed nonlinear product codes are constructed as N-dimensional product codes where the constituent codes are nonlinear binary codes derived from the linear codes over higher order alphabets, for example, Preparata or Kerdock codes. The performance and the complexity of the proposed construction are evaluated using the well-known nonlinear Nordstrom-Robinson code, which is presented in the generalized array code format with a low complexity trellis. The proposed construction shows the additional coding gain, reduced error floor, and lower implementation complexity. The (64, 24, 12) nonlinear binary product code has an effective gain of about 2.5 dB and 1 dB gain at a BER of $10^{-6}$ when compared to the (64, 15, 16) linear product code and the (64, 24, 10) linear product code, respectively. The (256, 64, 36) nonlinear binary product code composed of two Nordstrom-Robinson codes has an effective gain of about 0.7 dB at a BER of $10^{-5}$ when compared to the (256, 64, 25) linear product code composed of two (16, 8, 5) quasi-cyclic codes.

• 대한전자공학회논문지TC
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• 제46권2호
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• pp.152-161
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• 2009

추적 재밍 신호는 얼리-레이트 게이트를 사용하는 코드 추적 회로에 오동작을 야기하므로, 이에 대항하는 코드 추적 회로가 필요하다. 본 논문에서는 주파수 도약 확산 시스템에서 추적 재밍 신호가 존재하는 경우 수신기의 코드 추적 회로에서 발생하는 오동작을 피할 수 있는 선형 제한-가우시안 필터 알고리듬을 제안한다. 추적 재머가 야기하는 동기 회로의 오동작 메카니즘을 분석하고, 선형 제한-가우시안 필터가 이 문제를 해결할 수 있음을 수학적 분석 및 전산 모의 실험을 통해 입증한다.

• Journal of applied mathematics & informatics
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• 제26권1_2호
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• pp.107-120
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• 2008

There has been a recent growth of interest in codes with respect to a newly defined non-Hamming metric grown as the Rosenbloom-Tsfasman metric (RT, or $\rho$, in short). In this paper, the definitions of the Lee complete $\rho$ weight enumerator and the exact complete $\rho$ weight enumerator of a code over $M_n_\times_s(Z_4)$ are given, and the MacWilliams identities with respect to this RT metric for the two weight enumerators of a linear code over $M_n_\times_s(Z_4)$ are proven too. At last, we also prove that the MacWilliams identities for the Lee and exact complete $\rho$ weight enumerators of a linear code over $M_n_\times_s(Z_4)$ are the generalizations of the MacWilliams identities for the Lee and complete weight enumerators of the corresponding code over $Z_4$.

• 한국정보통신학회논문지
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• 제1권1호
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• pp.77-83
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• 1997

본 논문에서는 현재 디지털 이동통신 시스템에서 운용되고 있는 QCELP(Qualcomm Code Excited Linear Predictor) 음성부호화 방식과 향후 IMT-2000 (International Mobile Telecommunications 2000) 등의 시스템에서 사용 예정인 CS-ACELP(Conjugate Structure Algebraic Code Excited Linear Prediction) 음성부호화 방식과의 성능을 비교한다. 특히 무선 채널을 사용하는 이동통신환경의 특징인 채널에러로 인한 음성부호화기의 성능을 비교함으로써 채널에러에 강인한 음성부호화 알고리즘 설계에 대한 고찰을 유도한다.

• 한국통신학회논문지
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• 제18권9호
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• pp.1348-1357
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• 1993

본 논문에서는 디지틀 셀룰라 시스템을 위한 효율적인 8 kbps 음성부호화기로서, Code-excited linear prediction (CELP) 구조에 Trellis Coded Vector Excitation을 이용한 trellis code-excited linear prediction (TCELP) 음성 부호화 방식을 제시하였다. TCELP 구조에 근거한 최적 코드북 설계를 위해 traing seguence-based 알고리즘과 부호화 지연을 줄이는 trellis 심볼 release 방식이 개발되었고, 제시된 TCELP 시스템과 부호화 복잡도가 분석되었다. 끝으로 8 kbps TCELP 부호화기의 성능이 SNR/SEGSNR과 비공식 청취시험을 통해 평가되었다.

• Journal of Communications and Networks
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• 제1권3호
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• pp.153-157
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• 1999

In this paper, we derive finite-dimensional non-linear fil-ters for optimally reconstructing speech signals in Switched Predic-tion vocoders, Code Excited Linear Prediction(CELP) and Differ-ential Pulse Code Modulation (DPCM). Our filter is an extension of the Hidden Markov filter.

• 대한수학회보
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• 제37권3호
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• pp.493-505
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• 2000

We discuss the class of projective systems whose supports are the complement of the union of two linear subspaces in general position. We express the weight enumerators of the codes generated by these projective systems using two simplex codes corresponding to given linear subspaces. We also prove these codes are uniquely determined upto equivalence by their weight enumerators.

• 전자공학회논문지B
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• 제32B권1호
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• pp.96-102
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• 1995

This paper presents the VHSIC Hardware Description Language(VHDL) implementation of the Fixed Point Covariance Lattice(FLAT) algorithm for an Linear Predictive Coding(LPC) analysis and its related algorithms, such as the forth order high pass Infinite Impulse Response(IIR) filter, covariance matrix calculation, and Spectral Smoothing Technique(SST) in the Vector Sum Exited Linear Predictive(VSELP) speech coder that has been Selected as the standard speech coder for the North America and Japanese digital cellular. Existing Digital Signal Processor(DSP) chips used in digital cellular phones are derived from general purpose DSP chips, and thus, these DSP chips may not be optimal and effective architectures are to be designed for the above mentioned algorithms. Then we implemented the VHDL code based on the C code, Finally, we verified that VHDL results are the same as C code results for real speech data. The implemented VHDL code can be used for performing logic synthesis and for designing an LPC Application Specific Integrated Circuit(ASOC) chip and DsP chips. We first developed the C language code to investigate the correctness of algorithms and to compare C code results with VHDL code results block by block.