• Title/Summary/Keyword: large delay

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Tunable Composite Right/Left-Handed Delay Line with Large Group Delay for an FMCW Radar Transmitter

  • Park, Yong-Min;Ki, Dong-Wook
    • Journal of electromagnetic engineering and science
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    • v.12 no.2
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    • pp.166-170
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    • 2012
  • This paper presents a tunable composite right/left-handed (CRLH) delay line for a delay line discriminator that linearizes modulated frequency sweep in a frequency modulated continuous wave (FMCW) radar transmitter. The tunable delay line consists of 8 cascaded unit cells with series varactor diodes and shunt inductors. The reverse bias voltage of the varactor diode controlled the group delay through its junction capacitance. The measured results demonstrate a group delay of 8.12 ns and an insertion loss of 4.5 dB at 250 MHz, while a control voltage can be used to adjust the group delay by approximately 15 ns. A group delay per unit cell of approximately 1 ns was obtained, which is very large when compared with previously published results. This group delay can be used effectively in FMCW radar transmitters.

Towards Achieving the Maximum Capacity in Large Mobile Wireless Networks under Delay Constraints

  • Lin, Xiaojun;Shroff, Ness B.
    • Journal of Communications and Networks
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    • v.6 no.4
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    • pp.352-361
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    • 2004
  • In this paper, we study how to achieve the maximum capacity under delay constraints for large mobile wireless networks. We develop a systematic methodology for studying this problem in the asymptotic region when the number of nodes n in the network is large. We first identify a number of key parameters for a large class of scheduling schemes, and investigate the inherent tradeoffs among the capacity, the delay, and these scheduling parameters. Based on these inherent tradeoffs, we are able to compute the upper bound on the maximum per-node capacity of a large mobile wireless network under given delay constraints. Further, in the process of proving the upper bound, we are able to identify the optimal values of the key scheduling parameters. Knowing these optimal values, we can then develop scheduling schemes that achieve the upper bound up to some logarithmic factor, which suggests that our upper bound is fairly tight. We have applied this methodology to both the i.i.d. mobility model and the random way-point mobility model. In both cases, our methodology allows us to develop new scheduling schemes that can achieve larger capacity than previous proposals under the same delay constraints. In particular, for the i.i.d. mobility model, our scheme can achieve (n-1/3/log3/2 n) per-node capacity with constant delay. This demonstrates that, under the i.i.d. mobility model, mobility increases the capacity even with constant delays. Our methodology can also be extended to incorporate additional scheduling constraints.

the Design Methodology of Minimum-delay CMOS Buffer Circuits (최소 지연시간을 갖는 CMOS buffer 회로의 설계 기법)

  • 강인엽;송민규;이병호;김원찬
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.5
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    • pp.509-521
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    • 1988
  • In the designs of integrated circuits, the buffer circuits used for driving a large capacitive load from minimum-structured logic circuit outputs have important effects upon system throughputs. Therefore it is important to optimize the buffer circuits. In this paper, the principle of designing CMOS buffer circuits which have the minimum delay and drive the given capacitive load is discussed. That is, the effects of load capacitance upon rise time, fall time, and delay of the CMOS inverter and the effects of parasitic capacitances are finely analysed to calculate the requested minimum-delay CMOS buffer condition. This is different from the method by C.A. Mead et. al.[2.3.4.]which deals with passive-load-nMOS buffers. Large channel width MOS transistor stages are necessary to drive a large capacitive load. The effects of polysilicon gate resistances of such large stages upon delay are also analysed.And, the area of buffer circuits designed by the proposed method is smaller than that of buffer circuits designed by C.A. Mead's method.

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A Case Study on the Prevention of Construction Delays Using the Delay Management Index in Program Level Construction Projects (프로그램 수준 건설사업에서 지연관리지수(Delay Management Index)를 활용한 공사지연 예방 사례연구)

  • Yu, Jun-Hyeok;Kim, Ok-Kyue
    • Journal of the Korea Institute of Building Construction
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    • v.21 no.4
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    • pp.347-359
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    • 2021
  • Recently, construction projects have emerged in the form of program management, which is complicated by the large-scale of construction, and requires astronomical construction costs. In particular, projects that absolutely require management at the program level, such as large-scale construction projects, require overall control of the planned schedule and cost as a set of various projects, including infrastructure. But in Korea, there is no specific management standard for delays in construction. In order to avoid the risk of cost increase and project delay in the program-level construction project, it is necessary to apply more systematic management standards to prevent delay and to take a more preemptive response in the construction process. Therefore, in this study, a delay management index (DMI) was developed to successfully carry out large-scale construction projects at the program level and prevent delays in advance. In addition, case studies were conducted for large-scale construction projects, and a delay prevention system was established for program-level construction projects.

Enhanced TCP Congestion Control Mechanism for Networks with Large Bandwidth Delay Product (대역폭과 지연의 곱이 큰 네트워크를 위한 개선된 TCP 혼잡제어 메카니즘)

  • Park Tae-Joon;Lee Jae-Yong;Kim Byung-Chul
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.3 s.345
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    • pp.126-134
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    • 2006
  • Traditional TCP implementations have the under-utilization problem in large bandwidth delay product networks especially during the startup phase. In this paper, we propose a delay-based congestion control(DCC) mechanism to solve the problem. DCC is subdivided into linear and exponential growth phases. When there is no queueing delay, the congestion window grows exponentially during the congestion avoidance period. Otherwise, it maintains linear increase of congestion window similar to the legacy TCP congestion avoidance algorithm. The exponential increase phase such as the slow-start period in the legacy TCP can cause serious performance degradation by packet losses in case the buffer size is insufficient for the bandwidth-delay product, even though there is sufficient bandwidth. Thus, the DCC uses the RTT(Round Trip Time) status and the estimated queue size to prevent packet losses due to excessive transmission during the exponential growth phase. The simulation results show that the DCC algorithm significantly improves the TCP startup time and the throughput performance of TCP in large bandwidth delay product networks.

A Large-Signal Analysis of a Ring Oscillator with Feed-Forward and Negative Skewed Delay (부 스큐 지연 방식과 피드포워드 방식을 사용한 링 발진기의 대신호 해석)

  • Lee, Jeong-Kwang;Yi, Soon-Jai;Jeong, Hang-Geun
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.7
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    • pp.1332-1339
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    • 2010
  • This paper presents a large signal analysis of ring-type oscillators with feed forward and negative skewed delay scheme. The analysis yields the frequency increase factor due to two schemes. The large signal analysis is needed, because small signal model is limited to the initial stage of oscillation[1]. For verification of the frequency increase factor, simulation were done under the same conditions for the two different types of ring oscillators, i.e., with and without feed forward and negative skewed delay scheme. Simulation results are in good agreement with predictions based on analysis.

Robust Stability of Uncertain Linear Large-scale Systems with Time-delay via LMI Approach (LMI 기법을 이용한 시간지연 대규모 불확정성 선형 시스템의 강인 안정성)

  • Lee, Hee-Song;Kim, Jin-Hoon
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.48 no.10
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    • pp.1287-1292
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    • 1999
  • In large-scale systems, we frequently encounter the time-delay and the uncertainty, and these should be considered in the design of controller because these are the source of the degradation of the system performance and instability of system. In this paper, we consider the robust stability of the linear large scale systems with the uncertainties and the time-delays. The considered uncertainties are both structured uncertainty and the unstructured uncertainty. Also, the considered time-delays are time-varying having finite time derivative limits. Based on the Lyapunov theorem and the linear matrix inequality(LMI) technique, we present two sufficient conditions that guarantee the robust stability of the system. The conditions are expressed as the LMI forms which can be easily checked their feasibility by using the well-known LMI control toolbox. Finally, we show by two examples that our results are less conservative than the previous results.

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Consensus of High-Order Integrators With a Communication Delay (통신 지연을 갖는 고차 적분기시스템의 일치)

  • Lee, Sungryul
    • Journal of IKEEE
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    • v.19 no.4
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    • pp.520-525
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    • 2015
  • This paper investigates the consensus problem for high-order integrators with an arbitrary large communication delay. In order to solve this problem, new consensus controller with an additional design parameter that can eliminate the effect of a communication delay on the consensus problem is proposed. Also, it is proved that the proposed consensus controller can always solve the consensus problem of high-order integrators even in the presence of an arbitrarily large communication delay. Finally, an illustrative example is given in order to show the effectiveness of our design method.

Analysis of delay compensation in real-time dynamic hybrid testing with large integration time-step

  • Zhu, Fei;Wang, Jin-Ting;Jin, Feng;Gui, Yao;Zhou, Meng-Xia
    • Smart Structures and Systems
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    • v.14 no.6
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    • pp.1269-1289
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    • 2014
  • With the sub-stepping technique, the numerical analysis in real-time dynamic hybrid testing is split into the response analysis and signal generation tasks. Two target computers that operate in real-time may be assigned to implement these two tasks, respectively, for fully extending the simulation scale of the numerical substructure. In this case, the integration time-step of solving the dynamic response of the numerical substructure can be dozens of times bigger than the sampling time-step of the controller. The time delay between the real and desired feedback forces becomes more striking, which challenges the well-developed delay compensation methods in real-time dynamic hybrid testing. This paper focuses on displacement prediction and force correction for delay compensation in the real-time dynamic hybrid testing with a large integration time-step. A new displacement prediction scheme is proposed based on recently-developed explicit integration algorithms and compared with several commonly-used prediction procedures. The evaluation of its prediction accuracy is carried out theoretically, numerically and experimentally. Results indicate that the accuracy and effectiveness of the proposed prediction method are of significance.