• 전력전자학회논문지
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• 제27권1호
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• pp.56-62
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• 2022

In this paper, the effect of pulse width modulation methods on thermal loadings and power losses of single-phase five-level NPC inverters for photovoltaic systems are analyzed. The pulse width modulation methods affect the power losses of the NPC inverters and thus lead to different thermal loadings of NPC inverters. To identify the reliability-critical power device with respect to thermal stress, the thermal loadings of I- and T-type NPC inverters are analyzed by applying the unipolar pulse modulation method. Then, the effect of the discontinuous pulse width modulation method on power losses and thermal loadings of power devices of I- and T-type NPC inverters are analyzed. Finally, the operation of NPC inverters applying the discontinuous pulse modulation method is confirmed by experiments. The results show that the discontinuous pulse modulation method is able to improve the reliability of NPC inverters by reducing thermal loadings of reliability-critical power devices and it is more effective for T-type NPC inverters than I-type NPC inverters.

• Journal of Electrical Engineering and Technology
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• 제9권6호
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• pp.2168-2180
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• 2014

In this paper, a generalized power loss algorithm for multilevel neutral-point clamped (NPC) PWM inverters is presented, which is applicable to any level number of multilevel inverters. In the case of three-level inverters, the conduction loss depends on the MI (modulation index) and the PF (power factor), and the switching loss depends on a switching frequency, turn-on and turn-off energy. However, in the higher level of inverters than the three-level, the loss of semiconductor devices cannot be analyzed by conventional methods. The modulation depth should be considered in addition, to find the different conducting devices depending on the MI. In a case study, the power loss analysis for the three- and five-level NPC inverters has been performed with the proposed algorithm. The validity of the proposed algorithm is verified by simulation for the three-and five-level NPC inverters and experiment for three-level NPC inverter.

• Journal of Power Electronics
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• 제8권4호
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• pp.332-344
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• 2008

High frequency AC (HFAC) power distribution systems delivering power through a high frequency AC link with sinusoidal voltage have the advantages of simple structure and high efficiency. In a multiple module system, where multiple resonant inverters are paralleled to the high frequency AC bus through connection inductors, it is necessary for the output voltage phase angles of the inverters be controlled so that the circulating current among the inverters be minimized. However, the phase angle of the resonant inverters output voltage can not be controlled with conventional phase shift modulation or pulse width modulation. The phase angle is a function of both the phase of the gating signals and the impedance of the resonant tank. In this paper, we proposed a pulse phase modulation (PPM) concept for the resonant inverters, so that the phase angle of the output voltage can be regulated. The PPM can be used to minimize the circulating current between the resonant inverters. The mechanisms of the phase angle control and the PPM were explained. The small signal model of a PPM controlled half-bridge resonant inverter was analyzed. The concept was verified in a half bridge resonant inverter with a series-parallel resonant tank. An HFAC power distribution system with two resonant inverters connected in parallel to a 500kHz, 28V AC bus was presented to demonstrate the applicability of the concept in a high frequency power distribution system.

• 전력전자학회논문지
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• 제20권4호
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• pp.337-343
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• 2015

The multi-level inverters are highly efficient for high-power and medium-voltage AC driving applications, such as high-speed railway systems and renewable energy resources, because such inverters generate lower total harmonic distortion (THD) and electromagnetic interface (EMI). Lower switching stress occurs on switching devices compared with conventional two-level inverters. Depending on the multi-level inverter topology, the required components and number of switching devices are different, influencing the overall efficiency. Comparative studies of multi-level inverters based on loss analysis and output characteristic are necessary to apply multi-level inverters in high-power AC conversion systems. This paper proposes a theoretical loss analysis method based on piecewise linearization of characteristic curves of power semiconductor devices as well as loss analysis and output performance comparison of five-level neutral-point clamped, flying capacitor inverters, and high-level cascaded H-bridge multi-level inverters.

• Journal of Electrical Engineering and Technology
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• 제8권5호
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• pp.1062-1069
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• 2013

This paper proposes a simple current compensation method to improve the control performance of B4 inverters. Four-switch inverters so called B4 inverters employ only four switches. They have a split dc-link and one phase of three-phase motors is connected to the center-tap of split dc-link capacitors in B4 inverters. The voltage ripples in the center tap of the dc-link generate unbalanced three-phase voltages causing current ripples. To solve this problem, this paper presents a simple compensation method that adjusts switching times considering dc-link voltage ripples. The validity of the proposed method is verified by simulations and experiments carried out with a 1 HP induction machine.

• Journal of Power Electronics
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• 제11권5호
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• pp.688-696
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• 2011

This paper proposes a simple space vector PWM (SVPWM) scheme including overmodulation operation for 3-level NPC (Neutral Point Clamped) Inverters. The proposed scheme features a simple decision and calculation procedure for determining switching times in the overmodulation range by utilizing the duty calculation method used in 2-level inverters and the minimum phase error projection method widely employed in motor drive systems. The proposed scheme does not need to detect the angle of the reference vector or calculate trigonometric functions to determine the magnitude of the voltage vector. The magnitude of the angle of the new reference voltage vector is decided in advance with the help of the Fourier Series Expansion to extend the linearity of the output voltage of 3-level inverters in the overmodulation region. Experimental results demonstrate the validity of the proposed SVPWM scheme including overmodulation operation for 3-level NPC inverters.

• Journal of Power Electronics
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• 제10권2호
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• pp.146-154
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• 2010

In this paper two dual output current-type inverters are proposed. These inverters have been called a current source nines-witch inverter and a current-type z-source nine-switch inverter by the authors. The proposed inverters have two independent current source outputs. Compared to two independent current source inverters, the proposed converters are implemented with fewer semiconductor switches. Space vector modulation (SVM) is proposed for these converters. Simulation results show the validity and performance of the proposed inverters.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1994년도 추계학술대회 논문집 학회본부
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• pp.150-152
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• 1994

This paper deals with the parallel operation of inverters. To enlarge capacity of inverter system and reduce current ripples on inverter output side, two or more inverters are operated in parallel. Up to now six-step inverters and sinusoidal PWM inverters are considered in parallel operation, but using space-vector PWM inverters we can get many advantages of reducing ripple current energy and torque ripple and so on. As we can choose effective voltage vectors more freely than single operation, inverter output current ripples can be reduced by shifting beginning and end point of switching state back and forth.

• Journal of Power Electronics
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• 제9권4호
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• pp.623-630
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• 2009

This paper proposes a filter design guideline for grid-connected single-phase inverters. By analyzing the instantaneous voltage applied to the filter inductor, the switching ripple current through the filter inductor can be precisely calculated. Therefore, filter inductance can be designed accurately, which guaranties that the switching ripple current will be under the target value. The proposed filter design method is verified by experiment.

• 대한전기학회논문지
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• 제40권1호
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• pp.58-66
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• 1991

In inverters, time delays are inserted in the switching signals to prevent the dc lind shortage. This causes detrimental effects on the performance of the inverters, that is, the fundamental voltage drop and the generation of low order harmonics. This paper derives simple formula to describe the time delay effects in PWM inverters, where the effects may become significant because of relatively high switching frequencies. To compensate the tice delay effects, this paper presents two methods which are suitable for sinusoidal PWM and memory-based PWM respectively. Both are simple, easy to implement, and are shown to be effective, through the experiments, in improving the output waveform of PWM inverters.