• Title/Summary/Keyword: inverters

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Compensation of Dead-Time in PWM Voltage Inverters

  • Somchaiwong, Nitipong;Chaidee, Ekkachai
    • 제어로봇시스템학회:학술대회논문집
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    • 2005.06a
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    • pp.817-820
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    • 2005
  • Dead-Time is necessary to prevent the shot circuit of the full bridge inverters in pulse width modulation. However the output voltage deviations is the result of the Dead-Time that decrease power from the out put voltage inverters. This paper presents the method that compensate power output voltage inverters loss in Dead-Time circuit for DC Motor Drives with full bridge voltage inverters. The compensation of Dead-Time method is a sample and a low-cost solution. The comparison between the test results and simulation by MATLAB&SIMULINK under the same condition is similar.

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Determining the Capacity and Installation Positions of Regenerative Inverters at DC 1500V Electric Railway Substations (직류 1500V 전기철도용 변전소의 회생인버터 용량 및 설치위치 선정 방법)

  • Bae, Chang-Han;Han, Moon-Seub;Kim, Yong-Ki;Kwon, Sam-Young;Park, Hyun-June
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.55 no.9
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    • pp.478-484
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    • 2006
  • The paper presents methods of determining the capacity and installation positions of regenerative inverters installed in DC 1500V electric railway system. We suggested a method that approximates using parameters related to substations where regenerative inverters are installed, railway lines and operating motor cars, and another that calculates using regenerative power obtained from Train performance Simulation (TPS) and Power Flow Simulation (PFS). We carried out TPS and PFS for Seoul Subway Line $5{\sim}8$, calculating regenerative power and determining substations where regenerative inverters would be installed and the optimal capacity and number of inverters to be installed.

A Study on The Resonant Frequency Following Control of Resonant Inverters (공진형 인버터의 공진 주파수 추종 제어에 관한 연구)

  • Kim, Nam-Jeung;Yo, Wan-Sik;Cho, Kyu-Min;In, Chi-Gak
    • Proceedings of the KIEE Conference
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    • 2000.07b
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    • pp.1177-1181
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    • 2000
  • Usually, in many applications. high frequency resonant inverters are used, and the PAM(Pulse Amplitude Modulation), PFM(Pulse Frequency Modulation) or PWM(Pulse Width Modulation) techniques are used to control the output power of resonant inverters. And the resonant inverters have to control the output frequency for the reliable operation under the variable load conditions. In this paper, a new switching scheme is proposed as a resonant frequency following control of resonant inverters. With the proposed method. it can be obtained that optimum resonant frequency and unity output displacement factor under the variable resonant frequency adaptively. The detail algorithm of the proposed switching scheme and its characteristics are discussed. And the veridity of the proposed method is confirmed with the experimental results.

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An Improved Phase-Shifted Carrier Pulse Width Modulation Based on the Artificial Bee Colony Algorithm for Cascaded H-Bridge Multilevel Inverters

  • Cai, Xinjian;Wu, Zhenxing;Li, Quanfeng;Wang, Shuxiu
    • Journal of Power Electronics
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    • v.16 no.2
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    • pp.512-521
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    • 2016
  • Cascaded H-bridge multilevel (CHBML) inverters usually include a large number of isolated dc-voltage sources. Some faults in the dc-voltage sources result in unequal cell dc voltages. Unfortunately, the conventional phase-shifted carrier (PSC) PWM method that is widely used for CHBML inverters cannot eliminate low frequency sideband harmonics when the cell dc voltages are not equal. This paper analyzes the principle of sideband harmonic elimination, and proposes an improved PSCPWM that can eliminate low frequency sideband harmonics under the condition of unequal dc voltages. In order to calculate the carrier phases, it is necessary to solve transcendental equations for low frequency sideband harmonic elimination. Therefore, an approach based on the artificial bee colony (ABC) algorithm is presented in this paper. The proposed PSCPWM method enhances the reliability of CHBML inverters. The proposed PSCPWM is not limited to CHBML inverters. It can also be applied to other types of multilevel inverters. Simulation and experimental result obtained from a prototype CHBML inverter verify the theoretical analysis and the achievements made in this paper.

Investigation of Instability in Multiple Grid-Connected Inverters with LCL Output Filters

  • Asghari, Fariba;Safavizadeh, Arash;Karshenas, Hamid Reza
    • Journal of Power Electronics
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    • v.18 no.3
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    • pp.757-765
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    • 2018
  • This paper deals with the instability and resonant phenomena in distribution systems with multiple grid-connected inverters with an LCL output filter. The penetration of roof-top and other types of small photovoltaic (PV) grid-connected systems is rapidly increasing in distribution grids due to the attractive incentives set forth by different governments. When the number of such grid-connected inverters increases, their interaction with the distribution grid may cause undesirable effects such as instability and resonance. In this paper, a grid system with several grid-connected inverters is studied. Since proportional-resonant (PR) controllers are becoming more popular, it is assumed that most inverters use this type of controller. An LCL filter is also considered at the inverters output to make the case as realistic as possible. A complete modeling of this system is presented. Consequently, it is shown that such a system is prone to instability due to the interactions of the inverter controllers. A modification of PR controllers is presented where the output capacitor is virtually decreased. As a result, the instability is avoided. Simulation results are presented and show a good agreement with the theoretical studies. Experimental results obtained on a laboratory setup show the validity of the analysis.

Improved Reactive Power Sharing for Parallel-operated Inverters in Islanded Microgrids

  • Issa, Walid;Sharkh, Suleiman;Mallick, Tapas;Abusara, Mohammad
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1152-1162
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    • 2016
  • The unequal impedances of the interconnecting cables between paralleled inverters in the island mode of microgrids cause inaccurate reactive power sharing when the traditional droop control is used. Many studies in the literature adopt low speed communications between the inverters and the central control unit to overcome this problem. However, the losses of this communication link can be very detrimental to the performance of the controller. This paper proposes an improved reactive power-sharing control method. It employs infrequent measurements of the voltage at the point of common coupling (PCC) to estimate the output impedance between the inverters and the PCC and then readjust the voltage droop controller gains accordingly. The controller then reverts to being a traditional droop controller using the newly calculated gains. This increases the immunity of the controller against any losses in the communication links between the central control unit and the inverters. The capability of the proposed control method has been demonstrated by simulation and experimental results using a laboratory scale microgrid.

Common-mode Voltage Reduction for Inverters Connected in Parallel Using an MPC Method with Subdivided Voltage Vectors

  • Park, Joon Young;Sin, Jiook;Bak, Yeongsu;Park, Sung-Min;Lee, Kyo-Beum
    • Journal of Electrical Engineering and Technology
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    • v.13 no.3
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    • pp.1212-1222
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    • 2018
  • This paper presents a model predictive control (MPC) method to reduce the common-mode voltage (CMV) for inverters connected in parallel, which increase the capacity of energy storage systems (ESSs). The proposed method is based on subdivided voltage vectors, and the resulting algorithm can be applied to control the inverters. Furthermore, we use more voltage vectors than the conventional MPC algorithm; consequently, the quality of grid currents is improved. Several methods were proposed in order to reduce the CMV appearing during operation and its adverse effects. However, those methods have shown to increase the total harmonic distortion of the grid currents. Our method, however, aims to both avoid this drawback and effectively reduce the CMV. By employing phase difference in the carrier signals to control each inverter, we successfully reduced the CMV for inverters connected in parallel, thus outperforming similar methods. In fact, the validity of the proposed method was verified by simulations and experimental results.

Lifetime Evaluation of Power Devices of Single-Phase 5-Level NPC Inverters Considering Mission Profile of PV Systems (미션 프로파일을 고려한 단상 5-레벨 태양광 NPC 인버터의 전력 반도체 소자 수명 분석)

  • Ryu, Taerim;Choi, Ui-Min
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.3
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    • pp.221-227
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    • 2022
  • The reliability improvement of PV systems is an important factor in reducing the cost of PV energy because it is closely related to the annual energy production as well as the maintenance cost of PV systems. The reliability of PV inverters plays a key role in the reliability of PV systems because it is regarded as one of the most reliable critical parts of PV systems. The lifetime evaluation of PV inverters considering the mission profile in the design phase plays an important role in reliability design to ensure the required lifetime of PV inverters. In this paper, the lifetime of representative single-phase T-type and I-type NPC inverters are comparatively evaluated by considering the mission profile of a PV system recorded at Iza, Spain. Furthermore, the effect of the pulse width modulation methods on the lifetime is also discussed. The lifetime evaluation of PV inverters is performed at the component-level first and then the system level by considering all power devices.

Performance Analysis of a Novel Reduced Switch Cascaded Multilevel Inverter

  • Nagarajan, R.;Saravanan, M.
    • Journal of Power Electronics
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    • v.14 no.1
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    • pp.48-60
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    • 2014
  • Multilevel inverters have been widely used for high-voltage and high-power applications. Their performance is greatly superior to that of conventional two-level inverters due to their reduced total harmonic distortion (THD), lower switch ratings, lower electromagnetic interference, and higher dc link voltages. However, they have some disadvantages such as an increased number of components, a complex pulse width modulation control method, and a voltage-balancing problem. In this paper, a novel nine-level reduced switch cascaded multilevel inverter based on a multilevel DC link (MLDCL) inverter topology with reduced switching components is proposed to improve the multilevel inverter performance by compensating the above mentioned disadvantages. This topology requires fewer components when compared to diode clamped, flying capacitor and cascaded inverters and it requires fewer carrier signals and gate drives. Therefore, the overall cost and circuit complexity are greatly reduced. This paper presents modulation methods by a novel reference and multicarrier based PWM schemes for reduced switch cascaded multilevel inverters (RSCMLI). It also compares the performance of the proposed scheme with that of conventional cascaded multilevel inverters (CCMLI). Simulation results from MATLAB/SIMULINK are presented to verify the performance of the nine-level RSCMLI. Finally, a prototype of the nine-level RSCMLI topology is built and tested to show the performance of the inverter through experimental results.

Identification of Open-Switch and Short-Switch Failure of Multilevel Inverters through DWT and ANN Approach using LabVIEW

  • Parimalasundar, E.;Vanitha, N. Suthanthira
    • Journal of Electrical Engineering and Technology
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    • v.10 no.6
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    • pp.2277-2287
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    • 2015
  • In recent times, multilevel inverters are given high priority in many large industrial drive applications. However, the reliability of multilevel inverters are mainly affected by the failure of power electronic switches. In this paper, open-switch and short-switch failure of multilevel inverters and its identification using a high performance diagnostic system is discussed. Experimental and simulation studies were carried out on five level cascaded H-Bridge multilevel inverter and its output voltage waveforms were analyzed at different switch fault cases and at different modulation index values. Salient frequency domain features of the output voltage signal were extracted using the discrete wavelet transform multi resolution signal decomposition technique. Real time application of the proposed fault diagnostic system was implemented through the LabVIEW software. Artificial neural network was trained offline using the Matlab software and the resultant network parameters were transferred to LabVIEW real time system. In the proposed system, it is possible to precisely identify the individual faulty switch (may be due to open-switch (or) short-switch failure) of multilevel inverters.