• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.3
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• pp.558-567
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• 2003

Most digital signal processors provide 4 external interrupt input channels. But these are not sufficient for external interrupts of motor controls. Customized programmable interrupt controller, 8259, has 8 interrupt channels. Therefore, in the case of more external interrupt channels are needed, designers must expand by cascading the 8259. And this, 8259 device, have some inconvenience of interfacing the microprocessor in motor controls. In this paper, the expanded interrupt controller with 14 sufficient interrupt input channels for motor controls is designed using VHDL on the purpose of interfacing the microprocessor to the interrupt controller more compatibly and increasing the device utilization of FPGA/CPLD designed another peripherals. The interrupt controller model and each function blocks is proposed and illustrated. Simulation result are presented to estimate the designed interrupt controller.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.5-8
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• 1998

The adaptation to vector control theory is so generalized that it is widely used for implementing the high-performance of AC machine. Nowadays, One-Chip microprocessors or DSP chips are being well-used to implement Vector Control algorithm. DSP Chip have less flexibility for memory decoding and I/O rather than One-Chip microprocessor so that is requires more additional circuit and high cost. And the past One-Chip micro processors have difficult of implementation the complex algorithm because of small memory capacity and low arithmetic performance. Therefore we implemented the vector control algorithm of PMSM(Permanent Magnetic Synchronous Motors) using 80296SA form intel , which have many features as 6M memory space, 500MHz clock frequency, including memory decoding circuit and general I/O, Special I/O(EPA, Interrupt controller, Timer/Count, PWM generator) which is proper controller for the complex algorithm or operation program requiring so much memory capacity, So in this paper we fully digitized the vector control of PMSM included SVPWM Voltage controller using the intel 80296SA

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38B no.10
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• pp.785-800
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• 2013

In MANET, AODV(Ad hoc On-demand Distance Vector) has its advantages as on-demand approach but it also has a disadvantage that the control packet overhead is high compared to other routing protocols. This paper improves the problem caused by Hello messages that are broadcasted periodically to detect the local connectivity and maintain neighbor list. Periodic hello messages reduce the Packet delivery ratio and the efficiency in the limited bandwidth. And its increased Control packet overhead leads to decrease the Residual battery capacity and the Network lifetime. Further, non-reactive nature of periodic hello messages in AODV has also been the source of numerous controversies. In order to solve these problems, this paper improves the performance by using the interrupt driven approach which removes periodic hello messages and decreases the Control packet overhead. Performance comparisons between the traditional AODV and proposed mod_AODV done with network simulator QualNet 5.0 show that the mod_AODV performs better in most performance metrics under scenarios with various values of simulation parameters.

• Proceedings of the Korean Information Science Society Conference
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• 2000.04a
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• pp.457-459
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• 2000

최근 이동단말기나 PDA, 스마트폰과 같은 정보기기나 디지털 가전기기의 사용이 증대됨에 따라, ARM코어 시스템을 기반으로 하는 프로세서와 이를 운영하기 위한 소프트웨어 수요도 증가하고 있다. 본 논문은 프로세서를 운영하기 위한 소프트웨어 중에서 예외처리를 위한 일반적인 인터럽트 제어를 다룬다. ARM 시스템 상에서 임의의 주변 장치(타이머/카운터)에 의해 발생하는 인터럽트 처리 과정과 예외처리를 제어하기 위한 벡터 테이블을 구성하는 방법에 대해 분석한다. 그리고 인터럽트를 처리하는 인터럽트 코드부분과 벡터 테이블내의 인터럽트의 상호 연관성에 대해 논의한다.

• Proceedings of the KSR Conference
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• 2010.06a
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• pp.213-219
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• 2010

MCU(Micro Controller Unit) used for the automobiles has been required for improving of the safety and high reliability. Also, the necessity of high performance MCU equipped with high fuel-efficiency has been risen according to increased requests of high fuel-efficiency and improving the occupants safety with the development of intelligent vehicles and future vehicles. The MPC5554 32-bit embedded controller, made by Freescale Semiconductor, specialized in the part of the power train provides the high reliability, fast interrupt process and real-time control. In This paper, the investigation on IPMSM using MPC5554 has been performed. Also SVPWM(Space Vector Pulse Width Modulation) is implemented to the servo system.

• Journal of the Semiconductor & Display Technology
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• v.3 no.1
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• pp.21-26
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• 2004

Recently with the development of power switching device and DSP which has peripheral devices to control AC servo system, the servo technology has met a new development opportunity. Those things make it possible to reduce the time of developing a AC servo system. Fixed point DSP such as TMS320F240x, and TMS320F28x series have a disadvantage in calculating floating number where TMS320C32 or TMS320C31 are floating point DSP. However they usually become a complex hardware system to implement the AC servo system and it increases the cost. In this study, a DSP based AC servo system with a 3-phase PMSM is proposed. The newly produced DSP TMX320F28l2-version C which has the performance of fast speed, 150MIPS, and a rich peripheral interface such as a 12bit high speed AD converter, QEP(Quadrature Encoder Pulse) circuit, PDPINT(Power Drive Protect Interrupt), SVPWM module and dead time module are used. This paper presents a method to overcome fixed point calculating using scaling all parameters. Also space vector pulse width modulation (SVPWM) using off-set voltage and a digital PI control are implemented to the servo system.

• Proceedings of the IEEK Conference
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• 2001.06a
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• pp.253-256
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• 2001

This paper describes a high speed MAC(Media Access Control) function chip for IEEE 802.11 MAC layer protocol. The MAC chip has control registers and interrupt scheme for interface with CPU and deals with transmission/reception of data as a unit of frame. The developed MAC chip is composed of protocol control block, transmission block, and reception block which supports the BCF function in IEEE 802.11 specification. The test suite which is adopted in order to verify operation of the MAC chip includes various functions, such as RTS-CTS frame exchange procedure, correct IFS(Inter Frame Space)timing, access procedure, random backoff procedure, retransmission procedure, fragmented frame transmission/reception procedure, duplicate reception frame detection, NAV(Network Allocation Vector), reception error processing, broadcast frame transmission/reception procedure, beacon frame transmission/reception procedure, and transmission/reception FIEO operation. By using this technique, it is possible to reduce the load of CPU and firmware size in high speed wireless LAN system.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.2
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• pp.198-207
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• 2008

The conventional Residual Current Protective Devices(RCD, or earth leakage circuit breaker, ELB) operates depending on the total leakage current which is the vector-sum of resistive and capacitive components of a leakage current. However, the electric disaster such as electric shock or fire is mainly caused by the resistive component. Therefore, in this view point, the RCD is more realistic when it operates by the resistive component of the leakage current. In this paper, a new algorithm for measuring the resistive leakage current from the total leakage current is suggested, and is realized to an actual circuit. According to the suggested algorithm, the resistive component of the leakage current can be found by integrating the total leakage current over only a half cycle of the line voltage, and it is realized by using analog switches and resettable integrators. It is confirmed through experiments that the suggested algorithm detects, within maximum average error of 6.74%, the resistive leakage current from the total leakage current, and the RCD employing the suggested algorithm brakes the circuit within the regular interrupt time(30msec).

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.917-918
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• 2007

The former earth leakage breaker is operating by total leakage current which is the vector-sum of resistive leakage current and capacitive leakage current. However, the electric disaster like the electric shock and fire is caused mainly by resistive leakage current. Therefore, the earth leakage breaker is ideal when it is operating by resistive leakage current. In this paper, the theory for finding the component of resistive leakage current from total leakage current is suggested and it is embodied to actual circuit. The resistive leakage current can be found by integrating the total leakage current during half cycle of line voltage. Thus, we can simply find resistive leakage current by using OP-AMP integrators, and we can confirm that the resistive leakage current is computed exactly from total leakage current obtained by resistive leakage current and capacitive leakage current. The results that the earth leakage breaker is operating within regular interrupt time are verified when the former earth leakage breaker's controller circuit is replaced by the proposed controller circuit.

• Asian-Australasian Journal of Animal Sciences
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• v.31 no.4
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• pp.489-498
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• 2018

Objective: Foot and mouth disease (FMD) and porcine reproductive and respiratory syndrome (PRRS) are major diseases that interrupt porcine production. Because they are viral diseases, vaccinations are of only limited effectiveness in preventing outbreaks. To establish an alternative multi-resistant strategy against FMD virus (FMDV) and PRRS virus (PRRSV), the present study introduced two genetic modification techniques to porcine cells. Methods: First, cluster of differentiation 163 (CD163), the PRRSV viral receptor, was edited with the clustered regularly interspaced short palindromic repeats-CRISPR-associated protein 9 technique. The CD163 gene sequences of edited cells and control cells differed. Second, short hairpin RNA (shRNAs) were integrated into the cells. The shRNAs, targeting the 3D gene of FMDV and the open reading frame 7 (ORF7) gene of PRRSV, were transferred into fibroblasts. We also developed an in vitro shRNA verification method with a target gene expression vector. Results: shRNA activity was confirmed in vitro with vectors that expressed the 3D and ORF7 genes in the cells. Cells containing shRNAs showed lower transcript levels than cells with only the expression vectors. The shRNAs were integrated into CD163-edited cells to combine the two techniques, and the viral genes were suppressed in these cells. Conclusion: We established a multi-resistant strategy against viral diseases and an in vitro shRNA verification method.