• 한국추진공학회:학술대회논문집
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• 한국추진공학회 2005년도 제24회 춘계학술대회논문집
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• pp.106-111
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• 2005

Failure mechanisms were investigated for the two layer thermal barrier coatings consisting of NiCrAlY bond coat and $ZrO_2-8wt.\% Y_{2}O_3$ ceramic coating during cyclic oxidation. $Al_{2}O_3$ developed at the ceramic coating/bond coat interface first, followed by the Cr/Ni rich oxides such as $NiCr_{2}O_4 and Ni(Al,Cr)_{2}O_4$ during cyclic oxidation It was observed that the spalling of ceramic coatings took place primarily within the NiCrAlY bond coat oxidation products or at the interface between the bond coat oxidation products and zirconia based ceramic coating or the bond coat. It was also observed that the fracture within these oxidation products occurred with the formation of $Ni(Cr,Al)_{2}O_4$ spinel or Cr/Ni rich oxides. It was therefore concluded that the formation of these oxides was a life-limiting event for the thermal barrier coatings.

• E2M - 전기 전자와 첨단 소재
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• 제7권3호
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• pp.231-235
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• 1994

The multi-dielectric layer $SiO_2$/$Si_3{N_4}$/$SiO_2$ (ONO) is used to improve charge retention and to scale down the memory device. The nitride layer of MNOS device is oxidize to form ONO system. During the oxidation of the nitride layer, the change of thickness of nitride layer and generation of interface state between nitride layer and top oxide layer occur. In this paper, effects of oxidation of the nitride layer is studied. The decreases of the nitride layer due to oxidation and trapping characteristics of interface state of multi layer dielectric film are investigated through the C-V measurement and F-N tunneling injection experiment using SONOS capacitor structure. Based on the experimental results, carrier trapping model for maximum flatband voltage shift of multi layer dielectric film is proposed and compared with experimental data. As a results of curve fitting, interface trap density between the top oxide and layer is determined as being $5{\times}10^11$~$2{\times}10^12$[$eV^1$$cm^2$].

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
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• pp.246-246
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• 2012

Smart catalyst design though novel catalyst preparation methods can improve catalytic activity of transition metals on reducible oxide supports such as titania by enhancement of metal oxide interface effects. In this work, we investigated Pt nanoparticles/titania catalysts under CO oxidation reaction by using novel preparation methods in order to enhance its catalytic activity by optimizing metal oxide interface. Arc plasma deposition (APD) and metal impregnation techniques are employed to achieve Pt metal deposition on titania supports which are prepared by multi-target sputtering and Sol-gel techniques. In order to tailor metal-support interface for catalytic CO oxidation reaction, Pt nanoparticles and thin films are deposited in varying surface coverages on sputtered titania films using APD. To assess the role of oxide support at the interface, APD-Pt is deposited on sputtered and Sol-gel prepared titania films. Lastly, characteristics of APD-Pt process are compared with Pt impregnation technique. Our results show that activity of Pt nanoparticles is improved when supported over Sol-Gel prepared titania than sputtered titania film. It is suggested that this enhanced activity can be partly ascribed to a very rough titania surface with the higher free metal surface area and higher number of sites at the interface between the metal and the support. Also, APD-Pt shows superior catalytic activity under CO oxidation as compared to Pt impregnation on sputtered titania support. XPS results show that bulk oxide is formed on Pt when deposited through impregnation and has higher proportion of oxidized Pt in the form of $Pt^{2+/4+}$ oxidation states than Pt metal. APD-Pt shows, however, mild oxidation with large proportion of active Pt metal. APD-Pt also shows trend of increasing CO oxidation activity with number of shots. The activity continues to increase with surface coverage beyond 100%, thus suggesting a very rough and porous Pt films with higher active surface metal sites due to an increased surface area available for the reactant CO and $O_2$ molecules. The results suggest a novel approach for systematic investigation into metal oxide interface by rational catalysts design which can be extended to other metal-support systems in the future.

• 한국전기전자재료학회논문지
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• 제18권12호
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• pp.1080-1086
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• 2005

We have studied the Ge redistribution after dry oxidation and the oxide growth rate of $Si_{1-x}Ge_x$ epitaxial layer. Oxidation were performed at 700, 800, 900, and $1,000\;^{\circ}C$. After the oxidation, the results of RBS (Rutherford Back Scattering) & AES(Auger Electron Spectroscopy) showed that Ge was completely rejected out of the oxide and pile up at $Si_{1-x}Ge_x$ interface. It is shown that the presence of Ge at the $Si_{1-x}Ge_x$ interface changes the dry oxidation rate. The dry oxidation rate was equal to that of pure Si regardless of Ge mole fraction at 700 and 800$^{\circ}C$, while it was decreased at both 900 and $1,000^{\circ}C$ as the Ge mole fraction was increased. The dry of idation rates were reduced for heavy Ge concentration, and large oxiidation time. In the parabolic growth region of $Si_{1-x}Ge_x$ oxidation, the parabolic rate constant are decreased due to the presence of Ge-rich layer. After the longer oxidation at the $1,000^{\circ}C$, AES showed that Ge peak distribution at the $Si_{1-x}Ge_x$ interface reduced by interdiffusion of silicon and germanium.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2004년도 제5회 압연심포지엄 신 시장 개척을 위한 압연기술
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• pp.277-284
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• 2004

Low carbon steels containing Si of up to $1.2\;wt\%$ were oxidized in air at 1373 K and 1523 K, i.e. below and above the eutectic temperature of FeO and $Fe_2SiO_4$. The influence of a impurity element, S on behavior of scale formation during oxidation was investigated by using $M\"{o}chssbauer$ spectroscopy and EDS. This allowed establishment of an interface oxidation model of Si-added steel depending on temperature and an impurity element. A compound of FeO and FeS was formed in the scale/matrix interface of low carbon steels containing S of up to $0.03\;wt\%$ oxidized above 1213 K of the eutectic temperature. This was flat formed between $Fe_2SiO_4$ nodules along the scale/matrix interface without selective oxidation. It is due to low viscosity and high wettability of the compound of FeO and FeS in liquid. Conventional metallographic examinations revealed that roughness of the scale/matrix interface in Si-added steels became flat as the content of S increased. It was independent of oxidizing temperature and Si content. Effects of oxidizing temperature and an impurity element content on descaling characteristics in Si-added steels were evaluated by using a hydraulic descaling simulator. Good descaling characteristics was attributable to this flatness of the scale/matrix interface.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.418.2-418.2
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• 2016

$Al_2O_3$ passivation layer has excellent passivation properties at p-type Si surface. This $Al_2O_3$ layer forms thin $SiO_2$ layer at the interface. There were some studies about inserting thermal oxidation process to replace naturally grown oxide during $Al_2O_3$ deposition. They showed improving passivation properties. However, thermal oxidation process has disadvantage of expensive equipment and difficult control of thin layer formation. Wet chemical oxidation has advantages of low cost and easy thin oxide formation. In this study, $Al_2O_3$/$SiO_2/Si(100)$ interface was formed by wet chemical oxidation and PA-ALD process. $SiO_2$ layer at Si wafer was formed by $HCl/H_2O_2$, $H_2SO_4/H_2O_2$ and $HNO_3$, respectively. 20nm $Al_2O_3$ layer on $SiO_2/Si$ was deposited by PA-ALD. This $Al_2O_3/SiO_2/Si(100)$ interface were characterized by capacitance-voltage characteristics and quasi-steady-state photoconductance decay method.

• The Korean Journal of Ceramics
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• 제4권4호
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• pp.340-344
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• 1998

Failure mechanisms were investigated for the two layer thermal barrier coatings consisting of NiCrAlY bond coat and $ZrO_2$-8wt.% $Y_2O_3$ ceramic coating during cyclic oxidation. $Al_2O_3$ developed at the ceramic coating/bond coat interface first, followed by the Cr/Ni rich oxides such as $NiCr_2O_4$ and $Ni(Al, Cr)_2O_4$ during cyclic oxidation. It was observed that the spalling of ceramic coatings took place primarily within the NiCrAlY bond coat oxidation products or at the interface between the bond coat oxidation products and zirconia based ceramic coating or the bond coat. It was also observed that the fracture within these oxidation products occurred with the formation of $Ni(Cr, Al)_2O_4$ spinel or Cr/Ni rich oxides. It was therefore concluded that the formation of these oxides was a life-limiting event for the thermal barrier coatings.

• 한국세라믹학회지
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• 제35권6호
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• pp.535-542
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• 1998

SOI(silicon oninsulator) was fabricated through the direct bonding of a hydrophilized single crystal Si wafer and a thermally oxidized SiO2 thin film to investigate the stacking faults in silicon at the Si/SiO2 in-terface. At first the oxidation kinetics of SiO2 thin film and the stacking fault distribution at the oxidation interface were investigated. The stacking faults could be divided into two groups by their size and the small-er ones were incorporated into the larger ones as the oxidation time and temperature increased. The den-sity of the smaller ones based critically lower eventually. The SOI wafers directly bonded at the room temperature were annealed at 120$0^{\circ}C$ for 1 hour. The stacking faults at the bonding and oxidation interface were examined and there were anomalies in the distributions of the stacking faults of the bonded region to arrange in ordered ring-like fashion.

• 한국전기전자재료학회논문지
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• 제16권3호
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• pp.181-185
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• 2003

Influence of post gate oxidation anneal on Negative Bias Temperature Instability (NBTI) of PMOSFE has been investigated. At oxidation anneal temperature raised above 950$^{\circ}$C, a significant improvement of NBTI was observed which enables to reduce PMO V$\_$th/ shift occurred during a Bias Temperature (BT) stress. The high temperature anneal appears to suppress charge generations inside the gate oxide and near the silicon oxide interface during the BT stress. By measuring band-to-band tunneling currents and subthreshold slopes, reduction of oxide trapped charges and interface states at the high temperature oxidation anneal was confirmed.

• 한국전기전자재료학회논문지
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• 제17권4호
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• pp.373-377
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• 2004

We have investigated the electrical characterization of metal-oxide-semiconductor (MOS) capacitors formed on the inductively coupled plasma (ICP) etch-damaged both n- and p-type 4H-SiC. We found that there was an effect of a sacrificial oxidation treatment on the etch-damaged surfaces. Current-voltage and capacitance-voltage measurements of these MOS capacitors were used and referenced to those of prepared control samples without etch damage. It has been found that a sacrificial oxidation treatment can improve the electrical characteristics of MOS capacitors on etch-damaged 4H-SiC since the effective interface density and fixed oxide charges of etch-damaged samples have been found to increase while the breakdown field strength of the oxide decreased and the barrier height at the SiC-SiO$_2$ interface decreased for MOS capacitors on etch-damaged surfaces.