• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.9
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• pp.707-713
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• 2001

As the integrated circuit device shrinks to smaller dimensions, chemical mechanical polishing (CMP) process was requirdfo the global planarization of inter-metal dielectric (IMD) layer with free-defect. However, as the IMD layer gest thinner, micro-scratches are becoming as major defects. However, as the IMD layer gets thinner, micro-scratches are becoming as major defects. Micro-scratches are generated by agglomerated slurry, solidified and attached slurry in pipe line of slurry supply system. To prevent agglomerated slurry particle from inflow, we installed 0.5${\mu}{\textrm}{m}$ point of use (POU) filter, which is depth-type filter and has 80% filtering efficiency for the 1.0${\mu}{\textrm}{m}$ size particle. In this paper, we studied the relationship between defect generation and polished wafer counts to understand the exact efficiency fo the slurry filteration, and to find out the appropriate pad usage. Our experimental results showed that it sis impossible to prevent defect-causing particles perfectly through the depth-type filter. Thus, we suggest that it is necessary to optimize the slurry flow rate, and to install the high spray bar of de-ionized water (DIW) with high pressure, to overcome the weak-point of depth type filter.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.51 no.7
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• pp.311-315
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• 2002

Chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD), inter-level dielectric (ILD) layers of multi-layer interconnections. In this paper, we studied the characteristics of polishing pad, which can apply shallow trench isolation (STI)-CMP process for global planarization of multi-level interconnection structure. Also, we investigated the effects of different sets of polishing pad, such as soft and hard pad. As an experimental result, hard pad showed center-fast type, and soft pad showed edge-fast type. Totally, the defect level has shown little difference, however, the counts of scratch was detected less than 2 on JR111 pad. Through the above results, we can select optimum polishing pad, so we can expect the improvements of throughput and device yield.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.461-461
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• 2010

For a low dielectric constant inter-metal dielectric application, the low-k SiCOH film with a dielectric constant of 2.8-3.2 has been deposited by plasma-enhanced chemical vapor deposition with decamethylcyclopentasiloxane, cyclohexane, and helium which is carrier gas. In this work, we investigated chemical deposition rate, dielectric constant, characterization of plasma polymer films according to temperature(25C-200C) of substrate and change of component concentration. We measured impedance by using V-I prove during process. From experimental result, deposition rate decrease with increasing temperature. Through real time impedance analysis of chamber, we find corelation between film thickness and impedance by assuming equivalent circuit.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07a
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• pp.335-338
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• 2003

Chemical mechanical polishing (CMP) process has been widely used to planarize dielectric layers, which can be applied to the integrated circuits for sub-micron technology. Despite the increased use of CMP process, it is difficult to accomplish the global planarization of in the defect-free inter-layer dielectrics (ILD). Especially, defects such as micro-scratch lead to severe circuit failure which affect yield. CMP slurries can contain particles exceeding $1\;{\mu}m$ in size, which could cause micro-scratch on the wafer surface. In this paper, we have studied aging effect the of CMP sin as a function of particle size. We prepared and compared the self-developed silica slurry by adding of abrasives before and after annealing. As our preliminary experiment results, we could be obtained the relatively stable slurry characteristics comparable to original silica slurry in the slurry aging effect.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.9
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• pp.703-703
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• 2001

• Proceedings of the Korean Vacuum Society Conference
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• 1995.06a
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• pp.30-30
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• 1995

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.11a
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• pp.185-188
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• 2001

Chemical mechanical polishing(CMP) process is widely used for global planarization of inter-metal dielectric (IMD) layer and inter-layer dielectric (ILD) for deep sub-micron technology. However, as the IMD and ILD layer gets thinner, defects such as micro-scratch lead to severe circuit failure, which affect yield. In this paper, for the improvement of CMP Process, deionized water (DIW) pressure, purified $N_2$ (P$N_2$) gas, slurry filter and high spray bar were installed. Our experimental results show that DIW pressure and P$N_2$ gas factors were not related with removal rate, but edge hot-spot of patterned wafer had a serious relation. Also, the filter installation in CMP polisher could reduce defects after CMP process, it is shown that slurry filter plays an important role in determining consumable pad lifetime. The filter lifetime is dominated by the defects. However, the slurry filter is impossible to prevent defect-causing particles perfectly. Thus, we suggest that it is necessary to install the high spray bar of de-ionized water (DIW) with high pressure, to overcome the weak-point of slurry filter. Finally, we could expect the improvements of throughput, yield and stability in the ULSI fabrication process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.05c
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• pp.149-153
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• 2003

Chemical mechanical polishing (CMP) technology for global planarization of multi-level inter-connection structure has been widely studied for the next generation devices. CMP process has been paid attention to planarized pre-metal dielectric (PMD), inter-layer dielectric (ILD) interconnections. Expecially, shallow trench isolation (STI) used to CMP process on essential. Recently, the direct STI-CMP process without the conventional complex reverse moat etch process has established by using slurry additive with the high selectivity between $SiO_2$ and $Si_3N_4$ films for the purpose of process simplification and n-situ end point detection(EPD). However, STI-CMP process has various defects such as nitride residue, tom oxide and damage of silicon active region. To solve these problems, in this paper, we studied the planarization characteristics using a high selectivity slurry(HSS). As our experimental results, it was possible to achieve a global planarization and STI-CMP process could be dramatically simplified. Also we estimated the reliability through the repeated tests with the optimized process conditions in order to identify the reproducibility of HSS STI-CMP process.

• Journal of the Korean Vacuum Society
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• v.19 no.5
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• pp.347-352
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• 2010

To research the reduction of the dielectric constant depending on the ionic and electronic effects, the dielectric constant of SiOC film was obtained by C-V measurement using the structure of metal/SiOC film/Si, and $n^2$ calculated by the refractive index. The dielectric constant of SiOC film consists with dipole, ions and electrons. However, the dipole moment is ignored in the effect of dielectric constant in SiOC film. THe SiOC film was deposited by the plasma energy, and the gas precursor was dissociated and recombined. Therefore, the dielectric constant of the deposited film consisted of the polarity with ions. THe dielectric constant decreased after annealing process, because of the evaporation of OH hydroxyl group with polarity. The ideal SiOC film as low-k materials was annealed film with lowering the polarity, which is suitable for physical-chemical and electrical properties as an inter layer dielectric materials.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1995.11a
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• pp.105-108
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• 1995

The inter-metal dielectric SiOF films were fabricated using remote plasma-enhanced chemical vapour deposition with addition of SF$\sub$6/ gas. SiOF bond formation in these films was recognized by a chemical bonding structural study using FT-IR. The deposition rate and the dielectric constant of a deposited films were decreased with increasing SF$\sub$6/ gas. It was observed that leakage current of SiOF film was reduced the one order compared to a film without addtion of SF$\sub$6/ gas.