• Journal of Science Education
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• v.34 no.2
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• pp.193-202
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• 2010

This study investigated the impact of student-centered instructions on students' academic achievement in science and on their attitudes toward science. Participants included 208 middle school students. The pre- and post-test control group design was employed. The control group was designed to have traditional instructions while experimental group 1 was applied both student-centered instructions and traditional instructions, and experimental group 2 was applied student-centered instructions only. The chaper of "Stimulus and Response" was selected for this study, and students were treated for 15 hours. Data were analysed using ANOVA. Results indicated that student-centered instruction had a significant effect on students' academic achievement(p<.01). The improvement of achievement through student-centered lesson is neither depending on genders nor previous academic achievement levels. Student-centered instruction also had a significant effect on students' attitudes toward science(p< .01). Only half of the class if a student-centered lessons and improve attitudes toward science could be. The improvement of the attitudes toward science through student-centered instruction is not depending on genders. But, student-centered instruction was more effective on the average student and the lower level students than the upper level students.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.6
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• pp.431-441
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• 2003

This paper presents the design of 32 bit microprocessor for a sequence control using a field programmable gate array(FPGA). The microprocessor was designed by a VHDL with top down method, the program memory was separated from the data memory for high speed execution of sequence instructions. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. In order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 32 bits. And the real time debug operation was implemented for easeful debugging the designed processor with a single step run, PC break point run, data memory break point run. Also in this designed microprocessor, pulse instructions, step controllers, master controllers, BM and BCD type arithmetic instructions, barrel shift instructions were implemented for sequence logic control. The FPGA was synthesized under a Xilinx's Foundation 4.2i Project Manager using a V600EHQ240 which contains 600,000 gates. Finally simulation and experiment were successfully performed respectively. For showing good performance, the designed microprocessor for the sequence logic control was compared with the H8S/2148 microprocessor which contained many bit instructions for sequence logic control. The designed processor for the sequence logic showed good performance.

• Journal of The Korean Association For Science Education
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• v.32 no.2
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• pp.331-345
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• 2012

As a case study on the use of mentoring as a method of improving novice teachers' teaching professionalism in secondary science-gifted education, this study investigated the characteristics of mentoring science instructions for science-gifted students at the plan, performance, evaluation, and post-mentoring stages of the classes. One mentor and two mentees were selected, and mentoring in each mentee's instructions was conducted during nine classes over three times. We observed the total classes, and analyzed taped videos, the materials, the transcripts for mentoring and in-depth interviews, and field notes. The analyses of the results indicated that the characteristics of mentoring instructions, at the planning stage of the classes, exhibited the construction of more systematic classes, the escape from the schema that science instructions for science-gifted students were instructions using somewhat difficult experiments and the uses of diverse teaching strategies, the influence of the psychological burdens on developing science-gifted education programs, and the increase of the time preparing the classes. At the performance stage of the classes, the characteristics included the improvement in the quality of the classes, the influence of the psychological burdens on teaching the classes, and the inducements of some confusion on performing them. At the evaluation stage of the classes, the characteristics included the provision of the opportunities in deeply reflecting my own classes, and the provision of the practical power for improving the classes. Finally, the characteristics at the postmentoring stage could be attributed to the increase of mentees' self-confidence about their instructions and some development of mentors' teaching professionalism/mentoring skills.

• Journal of the Korean Society for Library and Information Science
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• v.56 no.1
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• pp.201-220
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• 2022

This study suggests a theoretical model of information literacy instructions in the context of the Extended Essay included in IB(International Baccalaureate) Diploma Program Core. The study particularly analyzed I-LEARN model as a model to teach and learn with information for inquiry-based learning since the model was developed for the purpose of learning with information. Some school districts in Korea adapted IB programs to address the need for better education. Findings indicate the followings. First, students can achieve deep understanding by applying a model of information literacy instructions that provides scaffolding. Second, the expected roles of school librarians in information literacy instructions for Extended Essay are process specialists, teachers, and instructional partners. Third, I-LEARN model is appropriate as a framework to teach information literacy skills for inquiry needed for Extended Essay. Fourth, I-LEARN assessment rubric is useful in assessing the process and outcomes of students' information seeking and use. Implications include that school librarians should develop themselves as experts in information literacy instructions for inquiry-based learning such as Extended Essay, and that Korean schools recognize the crucial role of school librarians in teaching information literacy skills for inquiry-based learinng.

• Proceedings of the IEEK Conference
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• 2002.07a
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• pp.666-669
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• 2002

A microprocessor with genetic instructions such as crossover, mutation and inversion is proposed. The processor is modeled using VHDL, synthesized to a schematic and implemented on a FPGA. The control path is implemented with a microprogram consisting of about 15032-bit microwords, and the operation of each instruction is checked through simulation.

• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1387-1390
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• 2003

The superscalar architecture shows limit in performance improvement recently. While, SMT(Simultaneous Multi-Threading) architecture is receiving remark. The purpose of SMT architecture is to improve the performance of superscalar microprocessors by executing multi threads at the same time. In this paper, a load/store unit(LSU) suitable for ARM-compatible SMT microprocessors is presented. This LSU supports load instructions and store instructions of ARM ISA. This LSU keeps away the degradation of SMT by cache miss.

• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1383-1386
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• 2003

In this paper, an ALU for Simultaneous Multi-Threading (SMT) microprocessors is designed. The SMT architecture improves notably performance and utilization of processes compared with conventional superscalar architectures by executing instructions from multiple threads at the same time. This ALU adopts data bypassing method to process multi-threads. And it can flush instructions in the same thread that generate exceptions such as branch misprediction. interrupt etc, performance of SMT microprocessors with data bypassing and exception handler can be improved.

• Proceedings of the Safety Management and Science Conference
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• 2006.04a
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• pp.331-339
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• 2006

This paper is to introduce guidelines for consumer and customer satisfaction. International standards such as ISO 10002, ISO/IEC Guide 14, ISO/IEC Guide 17 are considered. This study is to discuss guidelines for complaints handling in organization, and purchase information on goods and services intended for customers, and instructions for use of products of consumer interest.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.8
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• pp.937-949
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• 1988

This paper proposes a code optimization algorithm for dealing with hazards which are occurred in pipelined architecture due to resource dependence between executed instructions. This algorithm solves timing hazard which results from resource conflict between concurrently executing instructions, and sequencing hazard due to the delay time for branch target decision by reconstructing of instruction sequence without pipeline interlock. The reconstructed codes can be generated efficiently by considering timing hazard and sequencing hazard simultaneously. And dynamic execution time of program is improved by considering structral hazard which can be existed when pipeline is controlled dynamically.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.7
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• pp.746-758
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• 1988

This paper proposes a code scheduling algorithm which gives a software solution to the pipeline interlock. This algorithm provides a heuristic solution by recordering the instructions, instead of using hardware interlock mechanism when pipeline interlock prevents the execution of a machine instruction in a pipelined architecture. Program code size and overall execution time can be reduced due to the increased flexibility in the selection of instructions, which is possible from the alleviated ordering restriction on the use of conflict resources.