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The Design of 32 Bit Microprocessor for Sequence Control Using FPGA  

Yang, Oh (Dept. of Electronic Engineering, Chongju University)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.40, no.6, 2003 , pp. 431-441 More about this Journal
Abstract
This paper presents the design of 32 bit microprocessor for a sequence control using a field programmable gate array(FPGA). The microprocessor was designed by a VHDL with top down method, the program memory was separated from the data memory for high speed execution of sequence instructions. Therefore it was possible that sequence instructions could be operated at the same time during the instruction fetch cycle. In order to reduce the instruction decoding time and the interface time of the data memory interface, an instruction code size was implemented by 32 bits. And the real time debug operation was implemented for easeful debugging the designed processor with a single step run, PC break point run, data memory break point run. Also in this designed microprocessor, pulse instructions, step controllers, master controllers, BM and BCD type arithmetic instructions, barrel shift instructions were implemented for sequence logic control. The FPGA was synthesized under a Xilinx's Foundation 4.2i Project Manager using a V600EHQ240 which contains 600,000 gates. Finally simulation and experiment were successfully performed respectively. For showing good performance, the designed microprocessor for the sequence logic control was compared with the H8S/2148 microprocessor which contained many bit instructions for sequence logic control. The designed processor for the sequence logic showed good performance.
Keywords
FPGA; VHDL; Microprocessor Sequence logic control;
Citations & Related Records
Times Cited By KSCI : 1  (Citation Analysis)
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1 F. Bonfatti, G. Gadda, P. Daniela Monari, 'Reusable software Design for Programmable Logic controllers,' ACM SIGPLANT Notices, Vol.30, No.11, pp. 31-40, 1995   DOI
2 M. Morris Mano, 'Computer System Architecture', 1997
3 Koo. KH et al. 'Implementation of a RISC microprocessor for programmable logic controllers', Microprocess Microsys, 2000   DOI   ScienceOn
4 K. Koo, W. H. Kown, 'Predicting Execution Time of Relay Ladder Logic for Programmable Logic Controllers,' in Proceeding of the 1996 IEEE Conference on Emerging Technologies and Factory Automation, Vol.2, pp. 670-676, 1996   DOI
5 N. Aramaki, Y. Shimokawa, S. Kuno, 'A New Architecture for High-Performance Programmable Logic Controller,' in Proceeding of the 23rd International conference on Industrial Electronics, Control, and Instrumentation, Vol.1, pp. 187-190, 1997   DOI
6 Yoshiyuki Shirnokawa, Toshiyuki Matsushita, Hideo Furuno, Yoh Shimanuki, 'A High-Performance VLSI Chip of Programmable Controller and Its Language for Instrumentation and Electric Control', in Proceeding of the IECON'91 International Conference on Industrial Electronics, Control and Instrumentation, Vol.2, pp. 884-889, 1991   DOI
7 양 오, 'FPGA를 이용한 시퀀스 로직 제어용 고속 프로세서 설계', 대한전기학회 논문지 48권 12호, pp. 1554-1563, 1999   과학기술학회마을
8 Bruce W. Bomar, 'Implementation of Microprogrammed Control in FPGAs', in Proceeding of the IEEE Transactions on Industrial Electronics, Vol.49, NO.2, 2002   DOI   ScienceOn
9 R. Lipsett, C. Schaefer, 'VHDL : Hardware Description and Design', KALA, 1991
10 Miyazawa, I., Nagao, T., Fukagawa, M., Itoh, Y., Mizuya, T., Sekiguchi, T., 'Implementation of Ladder Diagram for Programmable Controller Using FPGA', in Proceeding of the 1999 7th IEEE International Conference on Emerging Technologies and Factory Automation, Vol.2, pp. 1381-1385, 1999   DOI
11 Mitsubishi, 'Programming Mannual : Common Instructions', 1999
12 Xilinx, 'VirtexTM-E 1.8V Fidle Programmable Gate Arrays', 2000
13 HITACHI Semiconductor, 'Hitachi Single-Chip Microcomputer H8S/2144 Series, H8S/2148 Series Hardware Manual', 1997
14 HITACHI Semiconductor, 'Hitachi Single-Chip Microcomputer H8S/2144 Series, H8S/2148 Series Programming Manual', 1997