• 전자공학회논문지C
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• 제35C권7호
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• pp.1-10
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• 1998

The first thing in designing application-specific instruction set processor is having instruction set closely matching hardware characteristics. This instruction set design problem can be more complicated when cobined with implementation method selection problem of each instruction. Our processor model supports two kinds of instructions-primitive or special instructions. Primitive instructions are implemented using common multifunctional hardware such as ALU. Special instructions require a set of dedicated hardware, which actually functions as a coprocessor to the main processor. In this case, special instructions and primitive instructions can be executed independently. In this paper, we present novel algorithm for genrating special instructions for given application. Parallelism between special instructions and primitive instructions is also considered during the performance estimation stage of generated special instructions.

• 한국컴퓨터정보학회논문지
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• 제17권10호
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• pp.11-23
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• 2012

본 논문에서는 OpenRISC 프로세서의 코드 크기를 저감하는 새로운 압축 명령어 집합 구조를 제시한다. 새로운 명령어와 형식은 기존 명령어들의 사용 빈도와 용법에 대한 프로파일 정보에 의해 결정된다. 제시된 기법에서는 기존의 32비트 명령어들과 연속적인 명령어들을 각각 대체하는 새로운 16비트 명령어와 32비트 명령어를 도입한다. 제시된 명령어는 세 유형으로 분류할 수 있다. 첫 번째는 사용 빈도가 높은 기존의 덧셈, 로드, 저장, 분기 명령어 등의 32비트 명령어들을 대체하는 새로운 16비트 명령어들이다. 두 번째 유형은 사용 빈도가 높은 두 개의 연속적인 로드 명령어, 두 개의 연속적인 저장 명령어, 32비트 데이터 이동 명령어를 압축하는 새로운 32비트 명령어들이다. 마지막으로 함수 프롤로그와 에필로그 명령어들을 각각 하나로 압축하는 두 개의 새로운 32비트 명령어가 제시된다. 추가된 명령어들을 디코딩하기 위해서 OpenRISC 하드웨어 디코더 부분이 확장된다. OpenRISC 1200프로세서에서 실험을 수행한 결과, 성능 저하 없이 30.4%의 코드 크기를 절감한다.

• 전자공학회논문지C
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• 제34C권9호
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• pp.43-52
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• 1997

Processors using the superscalar rchitecture can achieve high performance by executing multipel instructions in a clock cycle. It is made possible by having multiple functional units and issuing multiple instructions to functional units simultaneously. But instructions can be dependent on one another and these dependencies prevent some instructions form being issued at the same cycle. In this paper, we designed an issue unit of a superscalar RISC microprocessor that can issue four instructions per cycle. The issue unit receives instructions form a prefetch unit, and issues them in order at a rate of as high as four instructions in one cycle for maximum utilization of functional units. By using an instruction buffer, the unit decouples instruction fetch and issue to improve instruction ussue rate. The issue unit is composed of an instruction buffer and an instruction decoder. The instruction buffer aligns and stores instructions from the prefetch unit, and sends the earliest four available isstructions to the instruction decoder. The instruction decoder decodes instructions, and issues them if they are free form data dependencies and necessary functional units and rgister file prots are available. The issue unit is described with behavioral level HDL (lhardware description language). The result of simulation using C programs shows that instruction issue rate is improved as the instruction buffer size increases, and 12-entry instruction buffer is found to be optimum considering performance and hardware cost of the instruction buffer.

• Physical Therapy Rehabilitation Science
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• 제10권1호
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• pp.69-75
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• 2021

Objective: This study was aimed at investigating the effects of lumbar stabilization exercise according to correct verbal instructions in pain and muscle strengthening of the low back pain patients. Design: A randomized controlled trial. Methods: Twenty subjects with low back pain were selected. They were randomly assigned to one of two groups (10 in each group): namely the lumbar stabilization exercise and lumbar stabilization exercise according to the correct verbal instructions group. The lumbar stabilization exercise group performed lumbar stabilization exercises for 6 weeks (5 times a week). The lumbar stabilization exercise according to correct verbal instructions group performed lumbar stabilization exercise according to correct verbal instructions for 6 weeks (5 times a week). We measured pain, muscle power, proprioception, and body balance before and after exercise by using visual analog scale (VAS), digital handheld dynanometer, Joint repositioning error, time up and go test respectively. Results: We found statistically significant differences in pain, muscle power, proprioception, and body balance in lumbar stabilization exercise and lumbar stabilization exercise according to correct verbal instructions group, before and after (p<0.05). Conclusions: We confirmed the effect of lumbar stabilization exercise according to correct verbal instructions. Thus we thought these results could be used as basic data and reference for low back pain. But we need more study effect of correct verbal instructions on other exercises.

• 대한임베디드공학회논문지
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• 제8권1호
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• pp.17-24
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• 2013

In this paper, we present a multi-core processor including multimedia specific instructions to process multimedia data efficiently in the mobile environment. Multimedia specific instructions exploit subword level parallelism (SLP), while the multi-core processor exploits data level parallelism (DLP). These combined parallelisms improve the performance of multimedia processing applications. The proposed multi-core processor including multimedia specific instructions is implemented and tested using a Xilinx ISE 10.1 tool and SoCMaster3 testbed system including Vertex 4 FPGA. Experimental results using a fire detection algorithm show that multimedia specific instructions outperform baseline instructions in the same multi-core architecture in terms of performance (1.2x better), energy efficiency (1.37x better), and area efficiency (1.23x better).

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.931-934
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• 1999

For applications in multimedia to which genuine RISC microprocessors are not suitably applicable, a new generation of fast and flexible microprocessors is required. In this paper, as a technique of integrating DSP functionality in a general RISC processor, a RISC that can execute DSP extension instructions is developed to improve the performance of multimedia application execution. This processor can execute DSP instructions in parallel with the execution of ALU instructions for efficient and fast execution. In addition, the execution ability of integer instructions is improved by enhancing the RISC core itself.

• 한국과학교육학회지
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• 제6권2호
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• pp.9-13
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• 1986

This study was designed to investigate students' preferences of instructional modes in CAI which have concrete of formal operational level instructions. Thirty five students of the high school in America were assessed using Longeot test and were given CAI material on the Apple II e computer. The results of this study showed that students who were only capable of functioning at the concrete level of operations frequently preferred to attempt formal operational level instructions for which they were not capable of success. Further, formal operational students frequently preferred concrete operational instructions. There was also no significant difference in the selection of formal operational level of instructions between concrete and formal operational students. There was also no significant correlation between the number of selected formal operational level instructions and the Longeot test score. These results suggested the student's preference to a cognitive developmental level of instruction in CAI was independent of his or her cognitive developmental level.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권4호
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• pp.237-242
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• 2005

H.264/AVC adopts new features compared with previous multimedia algorithms. It is inefficient to implement some of the new blocks using existing DSP instructions. Hence, new instructions are required to implement H.264/AVC. This paper proposes novel instructions for intra-prediction, in-loop deblocking filter, entropy coding and integer transform. Performance comparisons show that the required computation cycles for the in-loop deblocking filter can be reduced about $20{\sim}25%$. This paper also proposes new instructions for the integer transform. The proposed instructions can execute one dimension forward/inverse integer transform. The integer transform can be implemented using much smaller hardware size than existing DSPs.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제13권3호
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• pp.1566-1582
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• 2019

Silent Data Corruptions (SDCs) is a serious reliability issue in many domains of computer system. The identification and protection of the program instructions that cause SDCs is one of the research hotspots in computer reliability field at present. A lot of solutions have already been proposed to solve this problem. However, many of them are hard to be applied widely due to time-consuming and expensive costs. This paper proposes an intelligent approach named SDCPredictor to identify the instructions that cause SDCs. SDCPredictor identifies SDC-causing Instructions depending on analyzing the static and dynamic features of instructions rather than fault injections. The experimental results demonstrate that SDCPredictor is highly accurate in predicting the SDCs proneness. It can achieve higher fault coverage than previous similar techniques in a moderate time cost.

• 한국가정과교육학회지
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• 제14권1호
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• pp.87-95
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• 2002

The purposel of this study was to examine the effects which the direct and the indirect instructions at a Home Economics class have on improving the learning achievements and attitudes. To accomplish these goals. 90 students. the number of two classes of the first tirade at p high school at Anyang city of Kyonggi province were selected. They are composed of the experimental group and the comparative group. Each group contained 40 students. The former was implemented by indirect instructions and the latter direct instructions. The 'Family and Domestic Life' unit of the first tirade was selected as the study subject to take effects and 30 periods of class were enforced. For the experimental measure of this study. the researcher used a pre-learning test. a learning attitude test. and a learning achievement test as means of measure. The two groups were confirmed as the group having the same quality, So after the experimental measure, the results of the post tests(included a learning achievement test and a learning attitude test) were verified by T-test in order to research the problematic subject. and SPSS/win statistics package was used for the processing of the statistics. The results are following: 1. The direct and the indirect instructions represented the meaningful differences in the learning achievements (p <.05). They represented the meaningful differences in improving the learning achievements of knowledge and understanding(p <.05). It was verified that the (order is more effective than the latter in improving the learning achievements of knowledge and understanding, and They represented the meaningful differences in the improving learning achievements of application (p <.05) 2. They represented the meaningful differences in the learning attitudes at a domestic class(p <.05) The latter is more effective than the former in changing into the positive learning attitudes. In the light of these result7. the direct instructions are effective in improving the learning achievements of knowledge and understanding. and the indirect instructions are effective in improving the learning achievements of application. Also the indirect instructions are more effective than the direct instructions in changing into the positive learning attitude.