• International Journal of Contents
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• v.9 no.4
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• pp.1-10
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• 2013

The electroencephalogram (EEG) time series is a measure of electrical activity received from multiple electrodes placed on the scalp of a human brain. It provides a direct measurement for characterizing the dynamic aspects of brain activities. These EEG signals are formed from a series of spatial and temporal data with multiple dimensions. Missing data could occur due to fault electrodes. These missing data can cause distortion, repudiation, and further, reduce the effectiveness of analyzing algorithms. Current methodologies for EEG analysis require a complete set of EEG data matrix as input. Therefore, an accurate and reliable imputation approach for missing values is necessary to avoid incomplete data sets for analyses and further improve the usage of performance techniques. This research proposes a new method to automatically recover random consecutive missing data from real world EEG data based on Linear Dynamical System. The proposed method aims to capture the optimal patterns based on two main characteristics in the coevolving EEG time series: namely, (i) dynamics via discovering temporal evolving behaviors, and (ii) correlations by identifying the relationships between multiple brain signals. From these exploits, the proposed method successfully identifies a few hidden variables and discovers their dynamics to impute missing values. The proposed method offers a robust and scalable approach with linear computation time over the size of sequences. A comparative study has been performed to assess the effectiveness of the proposed method against interpolation and missing values via Singular Value Decomposition (MSVD). The experimental simulations demonstrate that the proposed method provides better reconstruction performance up to 49% and 67% improvements over MSVD and interpolation approaches, respectively.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.2
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• pp.71-82
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• 1984

A programme, called BIPOLE, for the numerical analysis of twotimensional n-p-n bipolar transistors was developed. It has included the SRH and Auger recolnbination processes, the mobility dependence on the impurity density and the electric field, and the band-gap narrowing effect. The finite difference equations of the fundamental semiconductor equations are formulated using Newton's method for Poisson's equation and the divergence theorem for the hole and electron continuity equations without physical restrictions. The matrix of the linearized equations is sparse, symmetric M-matrix. For the solution of the linearized equations ICCG method and Gummel's algorithm have been employed. The programme BIPOLE has been applied to various kinds of the steady-state problems of n-p-n transistors. For the examples of applications the variations of common emitter current gain, emitter and diffusion capacitances, and input and output characteristics are calculated. Three-dimensional representations of some D.C. physical quantities such as potential and charge carrier distributions were displayed. This programme will be used for the nome,rical analysis of the distortion phenom ana of two-dimensional n-p-n transistors. The BIPOLE programme is available for everyone.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.1
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• pp.109-116
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• 2014

This paper presents a high-efficiency digital class-D audio amplifier using a composite interpolation filter for portable audio devices. The proposed audio amplifier is composed of an interpolation filter, a delta-sigma modulator, and a class-D output stage. To reduce power consumption, the designed interpolation filter has an optimized composite structure that uses a direct-form symmetric and Lagrange FIR filters. Compared to the filters with homogeneous structures, the hardware cost and complexity are reduced by about half by the optimization. The coefficients of the digital delta-sigma modulator are also optimized for low power consumption. The class-D output stage has gate driver circuits to reduce shoot-through current. The implemented class-D audio amplifier exhibited a high efficiency of 87.8 % with an output power of 57 mW at a load impedance of $16{\Omega}$ and a power supply voltage of 1.8 V. An outstanding signal-to-noise ratio of 90 dB and a total harmonic distortion plus noise of 0.03 % are achieved for a single-tone input signal with a frequency of 1 kHz.

• Journal of the Korean Society of Marine Environment & Safety
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• v.25 no.6
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• pp.802-808
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• 2019

DC motors are used extensively on shipboard, including as the ship's winch operating motor, owing to their simple speed control and excellent output torque characteristics. Moreover, they were used as propulsion motors in the early days of electric propulsion ships. However, mechanical rectifiers, such as brushes, used in DC motors have certain disadvantages. Hence, brushless DC (BLDC) motors are increasingly being used instead. While the electrical characteristics of both types of motors are similar, BLDC motors employ electronic rectifying devices, which use semiconductor elements, instead of mechanical rectifying devices. The inverter system for driving conventional BLDC motors uses a two-phase excitation method so that the waveform of the back electromotive force becomes trapezoidal. This causes harmonics and torque ripple in the phase current switching period in which the winding wire through which the current flows is changed. Researchers have studied and presented various methods to reduce the harmonics and torque ripple. This study applies a cascaded H-bridge multilevel inverter, which implements a proportional-integral speed current controller algorithm in the driving circuit of the BLDC motor for electric propulsion ships using a power analysis program. The simulation results of the modeled BLDC motor show that the driving method of the proposed BLDC motor improves the voltage waveform of the input side of the motor and remarkably reduces the harmonics and torque ripple compared with the conventional driving method.

• Journal of the Institute of Electronics and Information Engineers
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• v.54 no.2
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• pp.92-98
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• 2017

Generally, image contains geometrical and radiometric errors. Census transform can solve the stereo mismatching problem caused by the radiometric distortion. Since the general census transform compares center of window pixel value with neighbor pixel value, it is hard to obtain an accurate matching result when the difference of pixel value is not large. To solve that problem, we propose a census transform method that applies different 4-step weight for each pixel value difference by applying an assistance window inside the window kernel. If the current pixel value is larger than the average of assistance window pixel value, a high weight value is given. Otherwise, a low weight value is assigned to perform a differential census transform. After generating an initial disparity map using a weighted census transform and input images, the gradient information is additionally used to model a cost function for generating a final disparity map. In order to find an optimal cost value, we use guided filtering. Since the filtering is performed using the input image and the disparity image, the object boundary region can be preserved. From the experimental results, we confirm that the performance of the proposed stereo matching method is improved compare to the conventional method.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.1
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• pp.70-79
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• 2003

In this paper, T5 28-watt fluorescent lamp ballast using a piezoelectric transformer is fabricated and its characteristic is investigated. Developed electronic ballast is composed of basic circuits and blocks, such as rectifier part, active power factor corrector part, frequency oscillation part using microcontroller and feedback control, piezoelectric transformer and resonant half bridge inverters. The fabricated ballast uses to variable frequency methode in external so exciting that the frequency of piezoelectric transformer could be generated by voltage control oscillator using microcontroller(AT90S4433). The current of fluorescent lamp is detected by feedback control circuit. The signal of inverter output is received using Piezoelectric transformer, and then its output transmitted to fluorescent lamp. Traditional electromagnetic ballasts operated at 50-60Hz have been suffered from noticeable flicker, high loss, large crest factor and heavy weight. A new electronic ballast is operated at high frequency about 75kHz, and then Input power factor, distortion of total harmonic and lamp current crest factor are measured about 0.9!35, 12H and 1.5, respectively Accordingly, the traditional ballast is by fabricated electronic ballast using piezoelectric transformer and voltage control oscillator because of its lighter weight, high efficiency, economic merit and saving energy.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.1
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• pp.53-60
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• 2004

This work describes a l0b 150 MSample/s CMOS pipelined A/D converter (ADC) based on advanced bootsuapping techniques for higher input bandwidth than a sampling rate. The proposed ADC adopts a typical multi-step pipelined architecture, employs the merged-capacitor switching technique which improves sampling rate and resolution reducing by $50\%$ the number of unit capacitors used in the multiplying digital-to-analog converter. On-chip current and voltage references for high-speed driving capability of R & C loads and on-chip decimator circuits for high-speed testability are implemented with on-chip decoupling capacitors. The proposed AU is fabricated in a 0.18 um 1P6M CMOS technology. The measured differential and integral nonlinearities are within $-0.56{\~}+0.69$ LSB and $-1.50{\~}+0.68$ LSB, respectively. The prototype ADC shows the signal-to-noise-and-distortion ratio (SNDR) of 52 dB at 150 MSample/s. The active chip area is 2.2 mm2 (= 1.4 mm ${\times}$ 1.6 mm) and the chip consumes 123 mW at 150 MSample/s.

• Journal of Broadcast Engineering
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• v.22 no.1
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• pp.28-41
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• 2017

In this paper, the fast encoding algorithm in High Efficiency Video Coding (HEVC) encoder was studied. For the encoding efficiency, the current HEVC reference software is divided the input image into Coding Tree Unit (CTU). then, it should be re-divided into CU up to maximum depth in form of quad-tree for RDO (Rate-Distortion Optimization) in encoding precess. But, it is one of the reason why complexity is high in the encoding precess. In this paper, to reduce the high complexity in the encoding process, it proposed the method by determining the maximum depth of the CU using a hierarchical clustering at the pre-processing. The hierarchical clustering results represented an average combination of motion vectors (MV) on neighboring blocks. Experimental results showed that the proposed method could achieve an average of 16% time saving with minimal BD-rate loss at 1080p video resolution. When combined the previous fast algorithm, the proposed method could achieve an average 45.13% time saving with 1.84% BD-rate loss.