• Title/Summary/Keyword: in-loop filter

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Quantization Method in Spatial Domain for Screen Content Video Compression (스크린 콘텐츠 영상 압축을 위한 화소 영역 양자화 방법)

  • Nam, Jung-Hak;You, Jong-Hun;Sim, Dong-Gyu;Oh, Seoung-Jun
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.49 no.4
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    • pp.67-76
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    • 2012
  • Expanding services and productions for screen content videos recently, necessity of new compression techniques is emerging. The next-generation video coding standard is also considering specified coding tools for screen content videos, but it is still preliminary stage. In this paper, we investigate the characteristics of screen content videos for which we propose the quantization in spatial domain to improve coding efficiency. The proposed method directly employs quantization for residual signal without any transformations. The proposed method also applies adaptive coefficients prediction and in-loop filter for quantized residual signals in spatial domain based on the characteristics of screen content videos. As a results, the proposed method for the random access, the low-delay and the all-intra modes achieve bit-saving about 4.4%, 5.1%. and 4.9%, respectively.

Real Time Balancing Control of 2 Wheel Robot Using a Predictive Controller (예측 제어기를 이용한 2바퀴 로봇의 실시간 균형제어)

  • Kang, Jin-Gu
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.3
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    • pp.11-16
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    • 2014
  • In this paper, the two-wheels robot using a predictive controller to maintain the balance of the posture control in real time have been examined. A reaction wheel pendulum control method is adopted to maintain the balance while the bicycle robot is driving. The objective of this research was to design and implement a self-balancing algorithm using the dsPIC30F4013 embedded processor. To calculate the attitude in ARS using 2 axis gyro(roll, pitch) and 3 axis accelerometers (x, y, z). In this study, the disturbance of the posture for the asymmetrical propose to overcome the predictive controller which was a problem in the control of a remote system by introducing the two wheels of the robot controller and the linear prediction of the system controller combines the simulation was performed. Also, the robust characteristic for realizing the goal of designing a loop filter too robust controller is designed so that satisfactory stability of the control system to improve stability of the system to minimize degradation of performance was confirmed.

Ionized Fe Objects in UWIFE survey and IGRINS

  • Kim, Yesol;Koo, Bon-Chul;Pyo, Tae-Soo
    • The Bulletin of The Korean Astronomical Society
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    • v.42 no.1
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    • pp.54.1-54.1
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    • 2017
  • The UKIRT Wide-field Infrared survey for Fe+(UWIFE) is an unbiased survey of the first Galactic quadrant, with narrow-band filter centered on $1.644{\mu}m$. This survey covers $7^{\circ}$ < l < $62^{\circ}$ and |b| < $1.5^{\circ}$, where active interaction of stars and interstellar medium is expected. With median seeing of 0.8 arcsec, 5 - sigma detection limit of 18.7 mag and surface brightness limit of $8.1{\times}10^{-20}W\;m^{-2}arcsec^{-2}$, this survey gives an opportunity to statistically study Galactic [Fe II] - emitting sources for the first time. In order to identify Ionized Fe Objects (IFOs) in survey area systematically, we conducted visual inspection and automatic detection simultaneously. Total of ~300 extended IFOs are identified, most of them are found out to be part of supernova remnants (SNRs), young stellar objects, HII regions and planetary nebulae. The majority of IFOs are new discoveries which reveal shocked structures in high-extinction region. Spatial distribution of IFOs suggest that they trace Galactic structure. As a part of spectroscopic follow-up, we observed SNR candidate IFO J183740.829-061452.41 with IGRINS (Immersion Grating Infrared Spectrograph, Yuk+2010), mounted on 2.7m Harlan Smith telescope. This unknown arc-like, 6'-long IFO is coincident with inner part of radio continuum loop G25.8+0.2, which has been known as HII region. However, interior of this radio shell is filled with diffuse soft X-ray emission, and possible association of hard X-ray pulsar / pulsar wind nebula makes the nature of the IFO unclear. The H and K-band 2D spectrum shows shock-ionized [Fe II] filaments, which is apart from photoionized HII filaments. In this presentation we present basic statistics of newly identified IFOs, as well as the follow-up study of IFO J183740.829-061452.41.

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A New Decision-Directed Carrier Recovery Algorithm (새로운 결정지향 반송파 복원 알고리즘)

  • 고성찬
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.7A
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    • pp.1028-1035
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    • 1999
  • To increase the throughput of data transmission in burst-mode TDMA communication systems and also to get a good BER performance at the same time, it is essential to rapidly acquire the carrier while keeping the desirable tracking performance. To achieve this goal, in this paper, a new decision-directed carrier recovery algorithm is presented. The proposed scheme does not incorporate the PLL and suppress the Gaussian random process of input noise by the pre-stage low pass filter so as to get both the fast acquisition and a good performance. Through computer simulations, the performance of the scheme is analyzed with respect to the acquisition time and bit error rate. The cycle slip in the proposed scheme is seldom observed at very low SNR environment in contrast to the previous proposed one. Because of this merit, it is not required to do the differential encoding and decoding in the proposed scheme.

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ASIP Design for Real-Time Processing of H.264 (실시간 H.264/AVC 처리를 위한 ASIP설계)

  • Kim, Jin-Soo;SunWoo, Myung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.44 no.5
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    • pp.12-19
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    • 2007
  • This paper presents an ASIP(Application Specific Instruction Set Processor) for implementation of H.264/AVC, called VSIP(Video Specific Instruction-set Processor). The proposed VSIP has novel instructions and optimized hardware architectures for specific applications, such as intra prediction, in-loop deblocking filter, integer transform, etc. Moreover, VSIP has hardware accelerators for computation intensive parts in video signal processing, such as inter prediction and entropy coding. The VSIP has much smaller area and can dramatically reduce the number of memory access compared with commercial DSP chips, which result in low power consumption. The proposed VSIP can efficiently perform in real-time video processing and it can support various profiles and standards.

A Study on Improvement of 2-Dim Filtering Efficiency for Image (2차원 영상 필터링 효율 향상을 위한 기술연구)

  • Jeon, Joon-Hyeon
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.42 no.6
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    • pp.99-110
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    • 2005
  • These days, many image processing techniques have been studied for effective image compression. Among those, The 2D image filtering is widely used for 2D image processing. The 2D image filtering can be implemented by performing the 1D linear filter separately in the horizontal and vertical direction. Efficiency of image compression depends on what filtering method is used. Generally, circular convolution is widely used in 2D image filtering for image processing. However it doesn't consider correlations at the boundary region of image, therefore effective filtering can not be performed. To solve this problem. I proposed new convolution technique using loop convolution which satisfies the 'alias-free' and 'error-free' requirement in the reconstructed image. This method could provide more effective compression performance than former methods because it used highly-correlated data when performed at the boundary region. In this paper, Sub-band Coding(SBC) was adopted to analyze efficiency of proposed filtering technique, and the simulator developed by Java-based language was used to examine the performance of proposed method.

Three-phase current-fed soft-switching type resonant DC-link snubber converter with switched capacitor (스위치 캐패시터형 공진 DC-링크를 사용한 3상 전류형 소프트 스위칭 PWM 컨버터)

  • Kim, Ju-Yong;Suh, Ki-Young;Lee, Hyun-Woo;Mun, Sang-Pil;Kim, Young-Mun
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2005.11a
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    • pp.387-390
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    • 2005
  • A This paper presents a novel three-phase current-fed Pulse Width Modulation converter with switched- capacitor type resonant DC link commutation circuit operating PWM pattern strategy under a design consideration of low-pass filter, which can operate on the basis of the principle of zero current soft-switching commutation. In the first place, the steady-state operating principle of this converter with a new resonant DC link snubber circuit is described in connection with the equivalent operation circuit, together with the practical design procedure of the switched-capacitor type resonant DC link circuit is discussed from a theoretical viewpoint on the basis of a design example for high-power applications. The actively delayed time correction method to compensate distorted currents due to a relatively long resonant commutation time is newly implemented in the open loop control scheme so as to acquire the new optimum PWM pattern. Finally, the experiment or set-up in laboratory system or this converter is concretely demonstrated herein to confirm a zero current soft-switching commutation of this converter. The comparative evaluations between current-fed hard switching PWM and soft-switching PWM converters are carried out from a viewpoint of their PWM converter characteristics.

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Area Efficient Hardware Design for Performance Improvement of SAO (SAO의 성능개선을 위한 저면적 하드웨어 설계)

  • Choi, Jisoo;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.2
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    • pp.391-396
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    • 2013
  • In this paper, for HEVC decoding, an SAO hardware design with less processing time and reduced area is proposed. The proposed SAO hardware architecture introduces the design processing $8{\times}8$ CU to reduce the hardware area and uses internal registers to support $64{\times}64$ CU processing. Instead of previous top-down block partitioning, it uses bottom-up block partitioning to minimize the amount of calculation and processing time. As a result of synthesizing the proposed architecture with TSMC $0.18{\mu}m$ library, the gate area is 30.7k and the maximum frequency is 250MHz. The proposed SAO hardware architecture can process the decode of a macroblock in 64 cycles.

Fast Intra Mode Selection Algorithm Based on Edge Activity in Transform Domain for H.264/AVC Video (변환영역에서의 에지활동도에 기반한 H.264/AVC 고속 인트라모드 선택 방법)

  • Seo, Jae-Sung;Kim, Dong-Hyung
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.8C
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    • pp.790-800
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    • 2009
  • For the improvement of coding efficiency, the H.264/AYC standard uses new coding tools such as 1/4-pel-accurate motion estimation, multiple references, intra prediction, loop filter, variable block size etc. Using these coding tools, H.264/AYC has achieved significant improvements from rate-distortion point of view compared to existing standards. However, the encoder complexity was greatly increased due to these coding tools. We focus on the complexity reduction method of intra macroblock mode selection. The proposed algorithm for fast intra mode selection calculates the edge activity in transform domain, and performs fast encoding of intra frame in H.264/AYC through the fast prediction mode selection of intra4x4 and chrominance blocks. Simulation results show that the proposed method saves about 59.76% for QCIF sequences and 65.03% for CIF sequences of total encoding time, while bitrate increase and PSNR decrease are very small.

Performance Comparison of DCT Algorithm Implementations Based on Hardware Architecture (프로세서 구조에 따른 DCT 알고리즘의 구현 성능 비교)

  • Lee Jae-Seong;Pack Young-Cheol;Youn Dae-Hee
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.31 no.6C
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    • pp.637-644
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    • 2006
  • This paper presents performance and implementation comparisons of standard and fast DCT algorithms that are commonly used for subband filter bank in MPEG audio coders. The comparison is made according to the architectural difference of the implementation hardware. Fast DCT algorithms are known to have much less computational complexity than the standard method that involves computing a vector dot product of cosine coefficient. But, due to structural irregularity, fast DCT algorithms require extra cycles to generate the addresses for operands and to realign interim data. When algorithms are implemented using DSP processors that provide special operations such as single-cycle MAC (multiply-accumulate), zero-overhead nested loop, the standard algorithm is more advantageous than the fast algorithms. Also, in case of the finite-precision processing, the error performance of the standard method is far superior to that of the fast algorithms. In this paper, truncation errors and algorithmic suitability are analyzed and implementation results are provided to support the analysis.